Elektrik Elektronik Fakültesi

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http://hdl.handle.net/11527/18000

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  • Öge
    Synthesis and Optimization of Switching Nanoarrays
    (IEEE, 2015) Morgul, Muhammed Ceylan ; Altun, Mustafa ; Elektronik ve Haberleşme Mühendisliği ; Electronics and Communication Engineering
    In this paper, we study implementation of Boolean functions with crossbar nanoarrays where each crosspoint behaves as a switch. This study has two main parts “formulation” and “optimization”. In the first part of formulation, we investigate nanoarray based implementation methodologies in the literature. We classify them as two-terminal or four-terminal switch based. We generalize these methodologies to be applicable for any given Boolean function by offering array size formulations. In the second part of optimization, we focus on four-terminal switch based implementations; we propose a synthesis method to implement Boolean functions with optimal array sizes. Finally, we perform synthesis trials on standard benchmark circuits to evaluate the proposed optimal method in comparison with previous nanoarray based implementation methods. The proposed synthesis method gives by far the smallest array sizes and offers a new design paradigm for nanoarray based computing architectures.
  • Öge
    Power-Delay-Area Performance Modeling and Analysis for Nano-Crossbar Arrays
    (IEEE, 2016) Morgul, Muhammed Ceylan ; Peker, Furkan ; Altun, Mustafa ; Electronics and Communication Engineering ; Elektronik ve Haberleşme Mühendisliği
    In this study, we introduce an accurate capacitorresistor model for nano-crossbar arrays that is to be used for power/delay/area performance analysis and optimization. Although the proposed model is technology independent, we explicitly show its applicability for three different nanoarray technologies where each crosspoint behaves as a diode, a FET, and a four-terminal switch. In order to find related capacitor and resistor values, we investigate upper/lower value limits for technology dependent parameters including doping concentration, nanowire dimension, pitch size, and layer thickness. We also use different fan-out capacitors to test the integration capability of these technologies. Comparison between the proposed model and a conventional simple one, which generally uses one/two capacitors for each crosspoint, demonstrates the necessity of using our model in order to accurately calculate power and delay values. The only exception where both models give approximately same results is the presence of considerably low valued resistive connections between switches. However, we show that this is a rare case for nano-crossbar technologies.
  • Öge
    Synthesis and Performance Optimization of a Switching Nano-crossbar Computer
    (IEEE, 2016) Alexandrescu, Dan ; Altun, Mustafa ; Anghel, Lorena ; Bernasconi, Anna ; Ciriani, Valentina ; Frontini, Luca ; Tahoori, Mehdi ; Elektronik ve Haberleşme Mühendisliği ; Electronics and Communication Engineering
    Beyond CMOS, new technologies are emerging to extend electronic systems with features unavailable to siliconbased devices. Emerging technologies provide new logic and interconnection structures for computation, storage and communication that may require new design paradigms, and therefore trigger the development of a new generation of design automation tools. In the last decade, several emerging technologies have been proposed and the time has come for studying new adhoc techniques and tools for logic synthesis, physical design and testing. The main goal of this project is developing a complete synthesis and optimization methodology for switching nano-crossbar arrays that leads to the design and construction of an emerging nanocomputer. New models for diode, FET, and four-terminal switch based nanoarrays are developed. The proposed methodology implements both arithmetic and memory elements, necessitated by achieving a computer, by considering performance parameters such as area, delay, power dissipation, and reliability. With combination of arithmetic and memory elements a synchronous state machine (SSM), representation of a computer, is realized. The proposed methodology targets variety of emerging technologies including nanowire/nanotube crossbar arrays, magnetic switch-based structures, and crossbar memories. The results of this project will be a foundation of nano-crossbar based circuit design techniques and greatly contribute to the construction of emerging computers beyond CMOS. The topic of this project can be considered under the research area of “Emerging Computing Models” or “Computational Nanoelectronics”, more specifically the design, modeling, and simulation of new nanoscale switches beyond CMOS.
  • Öge
    Permanent and transient fault tolerance for reconfigurable nano-crossbar arrays
    ( 2016-08-25) Tunali, Onur ; Altun, Mustafa ; https://orcid.org/0000-0002-3103-1809 ; Department of Nanoscience and Nanoengineering ; Department of Electronics and Communication Engineering
    This paper studies fault tolerance in switching reconfigurable nano-crossbar arrays. Both permanent and transient faults are taken into account by independently assigning stuck-open and stuck-closed fault probabilities into crosspoints. In the presence of permanent faults, a fast and accurate heuristic algorithm is proposed that uses the techniques of index sorting, backtracking, and row matching. The algorithm's effectiveness is demonstrated on standard benchmark circuits in terms of runtime, success rate, and accuracy. In the presence of transient faults, tolerance analysis is performed by formally and recursively determining tolerable fault positions. In this way, we are able to specify fault tolerance performances of nano-crossbars without relying on randomly generated faults that is relatively costly regarding that the number of fault distributions in a crossbar grows exponentially with the crossbar size.
  • Öge
    Computing with Nano-Crossbar Arrays: Logic Synthesis and Fault Tolerance
    (IEEE, 2017) Altun, Mustafa ; Ciriani, Valentina ; Tahoori, Mehdi ; Elektronik ve Haberleşme Mühendisliği ; Electronics and Communication Engineering
    Nano-crossbar arrays have emerged as a strong candidate technology to replace CMOS in near future. They are regular and dense structures, and can be fabricated such that each crosspoint can be used as a conventional electronic component such as a diode, a FET, or a switch. This is a unique opportunity that allows us to integrate well developed conventional circuit design techniques into nano-crossbar arrays. Motivated by this, our project aims to develop a complete synthesis and performance optimization methodology for switching nano-crossbar arrays that leads to the design and construction of an emerging nanocomputer. First two work packages of the project are presented in this paper. These packages are on logic synthesis that aims to implement Boolean functions with nanocrossbar arrays with area optimization, and fault tolerance that aims to provide a full methodology in the presence of high fault densities and extreme parametric variations in nano-crossbar architectures.
  • Öge
    Logic Synthesis and Testing Techniques for Switching Nano-Crossbar Arrays
    (Elsevier, 2017) Alexandrescua, Dan ; Altun, Mustafa ; Anghel, Lorena ; Bernasconi, Anna ; Cirianie, Valentina ; Frontini, Luca ; Tahoori, Mehdi ; Elektronik ve Haberleşme Mühendisliği ; Electronics and Communication Engineering
    Beyond CMOS, new technologies are emerging to extend electronic systems with features unavailable to silicon-based devices. Emerging technologies provide new logic and interconnection structures for computation, storage and communication that may require new design paradigms, and therefore trigger the development of a new generation of design automation tools. In the last decade, several emerging technologies have been proposed and the time has come for studying new ad-hoc techniques and tools for logic synthesis, physical design and testing. The main goal of this project is developing a complete synthesis and optimization methodology for switching nano-crossbar arrays that leads to the design and construction of an emerging nanocomputer. New models for diode, FET, and four-terminal switch based nanoarrays are developed. The proposed methodology implements logic, arithmetic, and memory elements by considering performance parameters such as area, delay, power dissipation, and reliability. With combination of logic, arithmetic, and memory elements a synchronous state machine (SSM), representation of a computer, is realized. The proposed methodology targets variety of emerging technologies including nanowire/nanotube crossbar arrays, magnetic switch-based structures, and crossbar memories. The results of this project will be a foundation of nano-crossbar based circuit design techniques and greatly contribute to the construction of emerging computers beyond CMOS. The topic of this project can be considered under the research area of “Emerging Computing Models” or “Computational Nanoelectronics”, more specifically the design, modeling, and simulation of new nanoscale switches beyond CMOS.
  • Öge
    Spin-Torque Memristor based Offset Cancellation Technique for Sense Amplifiers
    (IEEE, 2017) Atasoyu, Mesut ; Altun, Mustafa ; Ozoguz, Serdar ; Roy, Kaushik ; Elektronik ve Haberleşme Mühendisliği ; Electronics and Communication Engineering
    Unpredictable threshold voltage changes of CMOS transistors cause input referred random offset (IRRO) in sense amplifiers. With the shrinkage of transistors in nano regime, it is being quite costly to cancel the offsets using conventional CMOS based techniques. Motivated by this fact, this study focuses on the IRRO cancellation with the aid of the spintorque memristor technology. Spin-torque memristors in series, compared to parallel, show less resistance and process variations. The resistance value of a spin-torque memristor is regarded as frozen when the current flow over the spin-torque memristor is lower than its critical switching current value. In fact, the proposed structure employs a non-destructive sensing scheme in order to achieve a relatively large sense margin by reducing the IRRO. Our main idea is to reduce or eliminate the IRRO by exploiting the spin-torque memristors for providing the current matching on the input transistors of the voltage comparator. In particular, the overwrite problem of the spin-torque memristor is solved by setting the critical switching current of the spin-torque memristor to be greater than a current value corresponding to the maximum IRRO value. We evaluate the IRRO cancellation technique on the proposed comparator or sense amplifier using 45nm predictive CMOS technology. Although sense amplifiers are targeted in this study, our technique can be applied to any analog amplifier suffering from the IRRO.
  • Öge
    A survey of fault-tolerance algorithms for reconfigurable nano-crossbar arrays
    (Association for Computing Machinery (ACM), 2017-01-05) Tunalı, Onur ; Altun, Mustafa ; https://orcid.org/0000-0002-3103-1809 ; Electronics and Communication Engineering
    Nano-crossbar arrays have emerged as a promising and viable technology to improve computing performance of electronic circuits beyond the limits of current CMOS. Arrays offer both structural efficiency with reconfiguration and prospective capability of integration with different technologies. However, certain problems need to be addressed, and the most important one is the prevailing occurrence of faults. Considering fault rate projections as high as 20% that is much higher than those of CMOS, it is fair to expect sophisticated fault-tolerance methods. The focus of this survey article is the assessment and evaluation of these methods and related algorithms applied in logic mapping and configuration processes. As a start, we concisely explain reconfigurable nano-crossbar arrays with their fault characteristics and models. Following that, we demonstrate configuration techniques of the arrays in the presence of permanent faults and elaborate on two main fault-tolerance methodologies, namely defect-unaware and defect-aware approaches, with a short review on advantages and disadvantages. For both methodologies, we present detailed experimental results of related algorithms regarding their strengths and weaknesses with a comprehensive yield, success rate and runtime analysis. Next, we overview fault-tolerance approaches for transient faults. As a conclusion, we overview the proposed algorithms with future directions and upcoming challenges.
  • Öge
    A fast logic mapping algorithm for multiple-type-defect tolerance in reconfigurable nano-crossbar arrays
    (Institute of Electrical and Electronics Engineers (IEEE), 2017-09-21) Tunali, Onur ; Altun, Mustafa ; https://orcid.org/0000-0002-3103-1809 ; Electronics and Communication Engineering
    Unlike conventional CMOS circuits, nano-crossbar arrays have considerably high defect rates. Multiple-type defects randomly occur both on crosspoint switches and wires that substantially complicates the design phase of the circuits with an elimination of systematic design choices. In order to overcome this problem, a logic mapping methodology is presented in this paper. A fast heuristic algorithm using pre-mapping logic morphing, defect oriented adaptive sorting, matching with Hadamard multiplication, and backtracking is introduced. The proposed algorithm covers both crosspoint defects including stuck-open and stuck-closed types and wire defects including bridging and broken types. Effects of stuck-closed defects, mostly disregarded in the literature, are studied in depth. In simulations, an industrial benchmark suit is used for obtaining runtime and success rate values of the proposed algorithm in comparison with those of the existing algorithms in the literature. A relative accuracy evaluation is also given in comparison with exact mapping techniques. Finally, the steps of the algorithm that are based on pre-mapping and heuristic matching techniques, are separately justified with experimental results.
  • Öge
    Defect Tolerant Logic Synthesis for Memristor Crossbars with Performance Evaluation
    (IEEE, 2018) Tunali, Onur ; Morgül, M. Ceylan ; Altun, Mustafa ; Elektronik ve Haberleşme Mühendisliği ; Electronics and Communication Engineering
    In this paper, we study defect-tolerant logic synthesis of memristor-based crossbar architectures. We propose a hybrid algorithm, combining heuristic and exact algorithms, that achieves perfect tolerance for 10-percent stuck-at open defect rates. Along with defect tolerance, we also consider area, delay, and power costs of the memristor crossbars to elaborate on two-level and multi-level logic designs.
  • Öge
    Towards optimization of open ended contact probes for breast cancer diagnosis
    (IEEE, 2018) Yılmaz, Tuba ; Elektronik ve Haberleşme Mühendisliği ; Electronics and Communication Engineering
    Development of new modalities for breast cancer detection have been a research interest due to the drawbacks of existing diagnostic technologies such as imaging with ionizing waves. In particular, microwave imaging has been investigated in the literature as a new modality for breast cancer detection. Microwave imaging is a promising technique due to the high dielectric contrast between benign and malignant lesions. With this motivation, the dielectric properties of the benign and malignant breast tissues were measured and such measurements have been performed with the open ended contact probes. The open ended contact probe technique widely used in laboratory environment to characterize the dielectric properties of materials with high permittivity and conductivity due to the advantages such as broad band measurement capabilities and limited sample size requirements. The utilization of the open ended contact probe technique as a breast cancer diagnostic technology have been previously envisioned in the literature. One such application is integration of these probes to biopsy guides to diagnose whether the breast lesions are benign or malignant. However, due to the poor measurement accuracy and repeatability the utilization of the technique as a diagnostic technology was not realized. The drawbacks of the technology mostly stem from the mathematical approaches and the deviations from the initial calibration conditions. In this work, to increase the accuracy of the open ended contact probe measurement technique, the probe structure is redesigned by removing the microwave connections and integrating the probe with the RF cable. Probe simulations are performed with Computer Simulation Technology (CST). The probe is tested with both known materials and more complex environments such as methanol and phantom experiments. Oil-in-gelatine dispersion phantom materials are composed and measured with the designed probe. Probes with small aperture diameters were also evaluated to investigate the potential practical utilization of such probes. Dielectric properties are calculated with in-house dielectric property retrieval algorithm. A good agreement is obtained with the reference data.
  • Öge
    A Fast Hill Climbing Algorithm for Defect and Variation Tolerant Logic Mapping of Nano-Crossbar Arrays
    (IEEE, 2018) Peker, Furkan ; Altun, Mustafa ; Elektronik ve Haberleşme Mühendisliği ; Electronics and Communication Engineering
    Nano-crossbar arrays are area and power efficient structures, generally realized with self-assembly based bottom-up fabrication methods as opposed to relatively costly traditional top-down lithography techniques. This advantage comes with a price: very high process variations. In this work, we focus on the worst-case delay optimization problem in the presence of high process variations. As a variation tolerant logic mapping scheme, a fast hill climbing algorithm is proposed; it offers similar or better delay improvements with much smaller runtimes compared to the methods in the literature. Our algorithm first performs a reducing operation for the crossbar motivated by the fact that the whole crossbar is not necessarily needed for the problem. This significantly decreases the computational load up to 72% percent for benchmark functions. Next, initial column mapping is applied. After the first two steps that can be considered as preparatory, the algorithm proceeds to the last step of hill climbing row search with column reordering where optimization for variation tolerance is performed. As an extension to this work, we directly apply our hill climbing algorithm on defective arrays to perform both defect and variation tolerance. Again, simulation results approve the speed of our algorithm, up to 600 times higher compared to the related algorithms in the literature without sacrificing defect and variation tolerance performance.
  • Öge
    Integrated Synthesis Methodology for Crossbar Arrays
    (IEEE, 2018) Morgul, M. Ceylan ; Frontini, Luca ; Tunali, Onur ; Vatajelu, E. Ioana ; Ciriani, Valentina ; Anghel, Lorena ; Moritz, Csaba Andras ; Stan, Mircea R. ; Alexandrescu, Dan ; Altun, Mustafa ; Elektronik ve Haberleşme Mühendisliği ; Electronics and Communication Engineering
    Nano-crossbar arrays have emerged as area and power efficient structures with an aim of achieving high performance computing beyond the limits of current CMOS. Due to the stochastic nature of nano-fabrication, nano arrays show different properties both in structural and physical device levels compared to conventional technologies. Mentioned factors introduce random characteristics that need to be carefully considered by synthesis process. For instance, a competent synthesis methodology must consider basic technology preference for switching elements, defect or fault rates of the given nano switching array and the variation values as well as their effects on performance metrics including power, delay, and area. Presented synthesis methodology in this study comprehensively covers the all specified factors and provides optimization algorithms for each step of the process.
  • Öge
    Yield analysis of nano-crossbar arrays for uniform and clustered defect distributions
    (IEEE, 2018-02-15) Tunali, Onur ; Altun, Mustafa ; https://orcid.org/0000-0002-3103-1809 ; Electronics and Communication Engineering
    During the fabrication of nano-crossbar arrays, certain amount of defective elements are introduced to the end product which affect the yield drastically. Current literature regarding the yield analysis of nano-crossbar arrays is very rough and limited to the uniform distribution of defect occurrence with a few exceptions. Since density feature of crossbar architectures is the main attracting point, we perform a detailed yield analysis by considering both uniform and non-uniform defect distributions. Firstly, we briefly explain the present algorithms and their features used in defect tolerant logic mapping. Secondly, we explain different defect distributions and logic function assumptions used in the literature. Thirdly, we formalize an approximate successful mapping probability metric for uniform distributions and determine area overheads. After that, we apply a regional defect density analysis by comparing uniform and clustered defects to formulate a looser upper bound for area overheads regarding clustered distributions. Finally, we conduct extensive experimental simulations with different defect distributions.
  • Öge
    Logic synthesis and defect tolerance for memristive crossbar arrays
    (Institute of Electrical and Electronics Engineers (IEEE), 2018-04-23) Tunali, Onur ; Altun, Mustafa ; ; https://orcid.org/0000-0002-3103-1809 ; Electronics and Communication Engineering
    Contrary to abundant memory related studies of memristive crossbar structures, logic oriented applications are only gaining popularity in recent years. In this paper, we study logic synthesis, regarding both two-level and multi level designs, and defect aspects of memristor based crossbar architectures. First, we introduce our two-level and multi-level logic synthesis techniques. We elaborate on advantages and disadvantages of both approaches with experimental results regarding area cost. After that, we devise a defect model in alignment with the conventional stuck-at open and closed paradigm. In addition, we determine the effects of defects to the operational capacity of the crossbar. Furthermore, we propose a preliminary defect tolerant Boolean logic mapping approach. In order to evaluate our approach, we conduct extensive Monte Carlo simulations with industrial benchmarks. Finally, we discuss future directions concerning both existing two-level and prospective multi-level logic designs as well as defect tolerance with area redundancy.
  • Öge
    Tissue mimicking phantoms for microwave brain stroke imaging
    (IEEE, 2018-10) Joof, Suleyman ; Cansiz, Gokhan ; Ozgur, Selcuk ; Yilmaz, Tuba ; Cayoren, Mehmet ; Akduman, Ibrahim ; Department of Electronics and Communication Engineering
    Within the past decade, once limited biomedical application of microwave imaging started to expand from the breast cancer imaging to imaging of other anomalies. One such anomaly is the brain stroke where the application of microwave imaging is two folds. One application is the identifying the source of stroke that is to categorize whether the stroke stems from blockage (ischemic) or bleeding (hemorrhagic). The other possible application is the continuous imaging of the progression of hemorrhagic stroke during the post-acute stage. In this work, a phantom for emulating the dielectric properties of the lossy brain tissue is given for testing of the microwave devices for continuous monitoring. The recipe is simple and is composed by mixing carboxymethyl cellulose, ethylene glycol, and deionized water. The recipe is simple, has viscose texture, and can be easily composed. Dielectric property measurements and comparison with the literature data is given in this paper
  • Öge
    A Satisfiability-Based Approximate Algorithm for Logic Synthesis Using Switching Lattices
    (IEEE, 2019) Aksoy, Levent ; Altun, Mustafa ; Elektronik ve Haberleşme Mühendisliği ; Electronics and Communication Engineering
    In recent years the realization of a logic function on two-dimensional arrays of four-terminal switches, called switching lattices, has attracted considerable interest. Exact and approximate methods have been proposed for the problem of synthesizing Boolean functions on switching lattices with minimum size, called lattice synthesis (LS) problem. However, the exact method can only handle relatively small instances and the approximate methods may find solutions that are far from the optimum. This paper introduces an approximate algorithm, called JANUS, that formalizes the problem of realizing a logic function on a given lattice, called lattice mapping (LM) problem, as a satisfiability problem and explores the search space of the LS problem in a dichotomic search manner, solving LM problems for possible lattice candidates. This paper also presents three methods to improve the initial upper bound and an efficient way to realize multiple logic functions on a single lattice. Experimental results show that JANUS can find solutions very close to the minimum in a reasonable time and obtain better results than the existing approximate methods. The solutions of JANUS can also be better than those of the exact method, which cannot be determined to be optimal due to the given time limit, where the maximum gain on the number of switches reaches up to 25%.
  • Öge
    Radio-frequency and microwave techniques for non-invasive measurement of blood glucose levels
    (MDPI, 2019) Yılmaz, Tuba ; Foster, Robert ; Hao, Yang ; Elektronik ve Haberleşme Mühendisliği ; Electronics and Communication Engineering
    This paper reviews non-invasive blood glucose measurements via dielectric spectroscopy at microwave frequencies presented in the literature. The intent is to clarify the key challenges that must be overcome if this approach is to work, to suggest some possible ways towards addressing these challenges and to contribute towards prevention of unnecessary ‘reinvention of the wheel’.
  • Öge
    Microwave dielectric property based classification of renal calculi: Application of a kNN algorithm
    (Elsevier, 2019) Saçlı, Banu ; Aydınalp, Cemanur ; Cansız, Gökhan ; joof, Sulayman ; Yılmaz, Tuba ; Çayören, Mehmet ; Önal, Bülent ; Akduman, İbrahim ; Elektronik ve Haberleşme Mühendisliği ; Electronics and Communication Engineering
    The proper management of renal lithiasis presents a challenge, with the recur- rence rate of the disease being as high as 46%. To prevent recurrence, the first step is the accurate categorization of the discarded renal calculi. Currently, the discarded renal calculi type is determined with the X-ray powder diffraction method which requires a cumbersome sample preparation. This work presents a new approach that can enable fast and accurate classification of discarded renal calculi with minimal sample preparation requirements. To do so, first, the measurements of the dielectric properties of naturally formed renal calculi are collected with the open-ended contact probe technique between 500 MHz to 6 GHz with 100 MHz intervals. Cole–Cole parameters are fitted to the measured dielectric properties with the generalized Newton–Raphson method. The re- nal calculi types are classified based on their Cole–Cole parameters as calcium oxalate, cystine, or struvite. The classification is performed using nearest neigh- bors (kNN) machine learning algorithm with the 10 nearest neighbors, where accuracy as high as 98.17% is achieved.
  • Öge
    Microwave dielectric spectroscopy of renal calculi: A large scale study on dielectric properties from 500 MHz to 18 GHz
    (IEEE, 2019) Yılmaz, Tuba ; Saçlı, Banu ; Cansız, Gökhan ; joof, Sulayman ; Aydınalp, Cemanur ; Çayören, Mehmet ; Akduman, İbrahim ; Önal, Bülent ; Elektronik ve Haberleşme Mühendisliği ; Electronics and Communication Engineering
    Inherent dielectric property discrepancy between biological anomalies and healthy tissue enables the microwave diagnostic and therapeutic technologies. To reveal this discrepancy, microwave dielectric properties of many different biological tissues are tabulated. Although the dielectric properties of biological tissues are well documented in the literature, the knowledge on microwave dielectric property behavior of the renal calculi is limited. This work presents ultra wideband dielectric properties of three renal calculi types between 500 MHz to 18 GHz to pave the way for possible application of microwave technologies for diagnosis, treatment, and prevention of urolithiasis. Microwave dielectric spectroscopy is performed on a total of 66 natural stone samples with open-ended coaxial probe technique. The samples belong to three commonly diagnosed renal calculi categories, namely calcium oxalate, cystine, struvite. Analysis of variance (ANOVA) test is performed on fitted Cole-Cole parameters and it was concluded that there is a statistically significant difference between the dielectric properties of the renal calculi types. A patient-to-patient statistical test is also performed and it was concluded that there is no statistical difference between the samples belonging to the same renal calculi category. To this end, based on the relative permittivity discrepancy between the renal calculi types, the category of renal calculi can be identified by measuring the dielectric properties of renal calculi with open-ended coaxial probe technique.