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ÖgeDesign of a highly efficient and linear driver power amplifier for 5G applications(Graduate School, 2025-01-28)Wireless communication systems enable data transmission from one point to another through non-physical connections, primarily using radio frequency signals. Transmitters use power amplifiers to ensure the transmitted signal reaches the receiver with adequate strength. Power amplifiers are the components with the highest power consumption in a transmitter system, making their performance critical. Key performance parameters include linearity, gain, efficiency, output power, and bandwidth. Power amplifiers require sufficient input power for efficient operation, often necessitating a multi-stage configuration, with a driver stage followed by an output stage. Modern wireless systems like 5G employ complex modulation techniques involving amplitude and phase variations, resulting in signals with high PAPR ranging from 6 to 15 dB. Conventional PA designs are optimized for peak power efficiency, but efficiency decreases significantly at back-off levels due to high PAPR signals. Addressing this issue necessitates innovative techniques, often focused on the output stage. However, the entire system's efficiency is also influenced by the driver stage, which traditionally uses high-linearity designs with moderate efficiency. Enhancing driver stage efficiency while maintaining adequate linearity can improve overall system performance. This thesis proposes a novel approach to designing a highly efficient and linear driver power amplifier by operating in the nonlinear deep Class AB region. While traditional driver power amplifiers prioritize linearity, this design integrates supply modulation to optimize the drain bias voltage, improving back-off efficiency without significantly compromising linearity. The driver power amplifier was designed and simulated in Advanced Design System software, employing a CGH40006P GaN HEMT transistor on a RO4350B substrate. The PA operates at 3.5 GHz with a -2.85 V gate and 20 V drain bias, achieving deep Class AB operation. The design includes sub-circuit blocks for biasing and stability, optimized for linearity and efficiency. Load/source pull simulations determined the impedance for maximum power-added efficiency used in IMN and OMN. Simulations indicate that the driver power amplifier achieves a PAE of 63.36%, an output power of 35.4 dBm, and a small signal gain of 16.2 dB at 3.5 GHz. Moreover, the output phase change is only 16° up to the 3 dB compression point. For a modulated 5G NR signal with an 8.5 dB PAPR and 40 MHz bandwidth, the driver power amplifier delivers an ACPR of -31.62 dBc and an EVM of 5.3%. Supply modulation across 10–20 V improves back-off efficiency by approximately 15% and 20% at 12 dB and 9 dB back-off levels. These results demonstrate the feasibility of integrating nonlinear, high-efficiency driver power amplifiers into modern communication systems.
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ÖgeBidirectional buck boost converter design(Graduate School, 2024-08-09)The importance of DC to DC converters increases with developing technology. Many of the electronic devices that we use contain AC/DC or DC to DC converters. One of the areas where DC to DC converters are most used is electric vehicles. DC to DC converters are used to charge the battery and energize the electric motors with the charged battery. There are many different types of DC to DC converters. Some of these have an isolated structure, while some have a non-isolated structure. The isolation status of the converter is determined according to the design needs. Converters operating as standard make a one-way conversion from the input direction to the output direction. However, due to the change and increase in today's needs, one-way DC to DC converters have become ineffective. Where bi-directional operation is required, two DC to DC converters had to be designed. This made the design both larger and less efficient. Therefore, using standard DC to DC converters bidirectionally by making some additions and arrangements is one of the most effective ways. Bi-directional operation is possible in both isolated and non-isolated DC to DC converter structures. Bi-directional buck boost converter can produce a regulated voltage both from input to output and from output to input. In this study, the details of the non-isolated structure that can operate bi-directionally are included. The non-isolated bi-directional converter is in buck boost converter topology. It contains four switching components in this structure. It is possible to operate this structure bidirectionally with the 4 MOSFETs used. While it operates in buck mode, buck boost mode and boost mode in the forward direction, it can operate in buck mode, buck boost mode and boost mode in the reverse direction. The way to achieve these modes is to determine the forward and reverse operating characteristics. The conditions under which the structure operates in forward or reverse direction depend on the input and output voltages. If appropriate source voltage is applied to the input of DC to DC, the structure works in the forward direction and produces output voltage. If the input and output voltage are not within an appropriate range, DC to DC converter goes into protection mode and produces no output. If the appropriate source voltage is applied to the DC to DC converter's output, the output side acts as an input and the input side acts as the output. It is possible to get voltage from the input side with the voltage applied from the output side. The bi-directional buck boost converter structure basically includes the following circuits: bi-directional current measurement circuits, voltage divider circuit MOSFET driver circuits, MOSFETs, switching inductor, microcontroller, auxiliary circuits and temperature measurement circuits. Management of operations within the converter is provided by the microprocessor. The microprocessor performs the operations of measuring input/output voltages, measuring bi-directional input/output currents, measuring temperature from the temperature sensor, and driving MOSFETs according to a certain algorithm. The operating mode of the converter is determined by the voltage and current measurement circuits in the structure. For forward operation, if the input voltage is greater than the output voltage, the converter operates in buck mode, if the input voltage is close to the output voltage, it operates in buck boost mode, and if the input voltage is lower than the output voltage, it operates in boost mode. In reverse operation, if the output voltage is greater than the input voltage, the converter operates in buck mode, if the output voltage is close to the input voltage, it operates in buck boost mode, and if the output voltage is lower than the input voltage, it operates in boost mode. Signals of certain pulse widths are applied to MOSFETs to produce input or output voltages. The width of these signals is determined by the voltage values the microcontroller measure from the input and output. This measurement takes place continuously. To obtain a constant output voltage in a structure where the input voltage varies, the pulse width must be constantly adjusted. The same is necessary for obtaining constant input voltage. As the current measurement circuits included in the converter design, both bi-directional current reading and limiting can be provided. The current can be read from both the input and output sides. If more current is drawn from the input or output of the DC to DC converter than the specified current limit, the current is limited. This limiting process is possible by adjusting the pulse width of the signal applied to the MOSFETs, just like adjusting the voltage.
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ÖgeMulti-purpose reconfigurable impedance matching network designs and antenna applications(Graduate School, 2024)Modern radio frequency communication front-ends utilize multiple parallel and cascaded transceivers to accommodate new communication standards that require additional frequency band allocations. However, the utilization of more and more transceiver modules to accommodate emerging communication standards results in higher costs, additional power consumption, larger circuit board sizes, and an increased probability of failure. Reconfigurable radio frequency circuits have become a promising solution to eliminate the deployment of multiple transceivers. A reconfigurable transceiver can cover multi-ple communication standards by changing its operational frequency that conventional front-ends require numerous transceivers. Also, reconfigurable transceivers can be configured with new communication standards without necessitating new transceiver designs. The use of reconfigurable circuit designs is not only advantageous in terms of reducing costs, board sizes, and enabling versatility in the utilization of new standards but also performance deviations caused by external effects and damaged parts of the circuits can be compensated. Owing to the mentioned advantages, interest in reconfigurable circuits has increased gradually both in academia and industry. The replacement of conventional circuits with reconfigurable versions has been studied in literature and basic implementations have been utilized by the industry over the years. One of these circuits which is used in all front-ends is impedance matching networks. Since impedance matching networks are at the core of all radio frequency and microwave circuit designs, reconfigurable versions have to be deeply investigated. In this thesis, novel frequency and load-tunable multi-purpose reconfigurable impedance matching network designs are proposed by starting from their building blocks and designed networks are evaluated in terms of various performance metrics. Microstrip transmission lines that are used in the reconfigurable impedance matching networks are simulated and measured first. Electromagnetic (EM) simulations and measurements are in good agreement and indicate less than 0.5 dB insertion loss with less than 1% signal power reflection inside the 0.1 GHz-4.5 GHz frequency band. Since the reconfigurable networks include tuning elements that have to be properly controlled without introducing additional power loss, a DC bias network is designed and examined. The bias network includes a DC blocking capacitor, two decoupling capacitors, and an RF choke inductor. Component values are calculated by considering operational frequency. Schematic, EM Co-simulations, and measurements revealed that insertion loss of the bias network is less than 0.25 dB with -20 dB return loss at the input and -30 dB isolation at the DC port. Also, the designed bias network achieves complete DC blocking performance under 8 V which is the control voltage limit of the tuning components. In this way, tunable circuit elements that are sensitive to DC voltage change can be controlled independently from each other. As a final building block, hyperabrupt varactor diodes are examined with analytical calculations, simulations, and measurements. Since hyper-abrupt varactor diodes are more sensitive to DC bias voltage than conventional abrupt varactor diodes, their equivalent circuit models are less accurate. In order to construct a more accurate measurement-based model, first, the low-frequency response of the varactor diodes is examined. The grading factor and capacitive tuning ratio of the varactor diode are corrected according to measurement results. High frequency response of the varactor diode demonstrates self resonance frequency which is used for revision of package parasitics. Finally, the varactor diode’s Q-factor and insertion loss are obtained to evaluate applicability on the desired multi-purpose reconfigurable impedance matching network. The Q-factor of the varactor diode increases with the applied reverse bias voltages and reaches to 1100 at 50 MHz. Insertion loss is less than 0.35 dB between 0.1 GHz and 5 GHz. Both the Q-factor and insertion measurements reveal that the selected varactor diode suits expectations on the tuning element well. After examining building blocks, and constructing measurement-based circuit models, a reconfigurable impedance matching network is analytically synthesized with and without including varactor diode parasitics. The initial design is then modified to reach a better Q-factor which includes fewer components on the series branch of the circuit. A modified design is also synthesized with and without parasitic injection. First, designed matching networks are examined in terms of insertion loss with schematic, EM Co-simulations, and measurements. Schematic simulations provide better estimation for measurement results in initial designs whereas EM Co-simulations are in better agreement with measurements for modified designs. The initial and modified designs with parasitic injection have less than 1.5 dB insertion loss and less than 2.5 dB insertion loss without parasitic injection inside the operational frequency band. Then evaluations are continued with the Q-factor which is the key indicator of broad Smith-chart impedance coverage. EM Co-simulations show better performance in terms of estimating measurement results compared to schematic simulations. Measurement results demonstrate Q-factor of the parasitic injected designs have a higher Q-factor than those without parasitic injection. This reveals that proper circuit synthesis is more important than reducing the number of components in series branches to obtain a higher Q-factor. However, reducing components in series branches still contributes to obtaining a higher Q-factor. The highest Q-factor is obtained on the modified design with parasitic injection with 70. The nonlinear behavior of impedance matching networks is also evaluated by determining output 1-dB compression points. A measurement set-up is constructed by using a preamplifier and the output of the amplifier is connected to matching networks. Measured results reveal that initial designs have almost the same 1-dB output compression point around 24.5±0.2 dBm, where the modified design with parasitic injection reaches the highest with 25.8 dBm and without parasitic injection has the lowest value with 23.5 dBm. Finally, Smith-chart impedance coverage of each matching network is examined with simulations and measurements. In order to measure the impedance coverage, an algorithm is proposed that measures the input impedance of matching networks under every possible combination of varactor diode reverse bias voltage from 0 V to 8 V with 0.2 V steps. Schematic simulations are in better agreement with the measurement results. Q-factor measurement results are aligned with the Smith-chart coverage which verifies the design concerns. The highest impedance coverage is obtained with the parasitic injected modified design which provides at least 50 % impedance coverage between 0.9 GHz and 2.2 GHz. Comparison with similar works reveals that the designed reconfigurable impedance matching network has superior performance in terms of frequency tunability, nonlinearity, insertion loss, and noise figure. This improvement is achieved by using a proper circuit model for enhanced tuning elements and detailed circuit synthesis. The modified design with parasitic injection which has the best performance among the other designs is used in antenna mismatch compensation. A simple patch antenna matched to 50Ω is simulated and measured in free space. Then, in proximity to the human head, the change in the input impedance of the antenna is observed with simulations and measurements. When the antenna is close to the human head, the input impedance is no longer matched to 50Ω. In that case, the transceiver has to consume more power to ensure communication. However, with the help of the designed matching network, input impedance change is compensated by tuning the input impedance to 50Ω for efficient power transmission. Moreover, a center frequency tuning feature is provided to the antenna with the help of the designed reconfigurable impedance matching network.
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ÖgeImplementation of a super-resolution algorithm using model composer(Graduate School, 2023)Today, the advancement of technology has multifaceted effects. The effects of these advancements can be given as examples of the increase in resolution and detail in the vision sensor systems at the front end, the developments in hardware and integrated technologies at the middle level, and, in the back end, the innovations in the implementation and testing stages of the compilers that program these hardware and integrations. Especially in the last ten years, developments in internet and image compression algorithms and devices such as televisions, smart phones and computers with image playback capability have increased the features such as the resolution and detail in the image. Although these developments can be followed by current cameras and image detection devices produced today, it is obvious that the resolution of the videos and photos recorded in the past should be increased. Meanwhile, basic and simple mathematical convergence solutions such as bilinear and bicubic interpolation are frequently used. However, these algorithms do not have the ability to increase information such as continuity, detail and sharpness in images with the weighted averaging basis they use. For this reason, special solutions aiming to increase the mentioned features have been produced. These solutions are called super-resolution imaging. Field Programmable Gate Arrays (FPGAs), which allow experimentation during prototyping and algorithm development with their ability to be reconfigured with hardware improvements, have also become useful for the implementation of algorithms with large dimensions and high computational needs. Although the development of the configuration files for these ICs is primarily done through IDEs that convert HDL codes to bitstreams, background compiler developments have also accelerated. Vivado High Level Synthesize compilers based on C/C++ programming languages have been used since 2014. The Model Composer extension, which is based on this compiler and provides FPGA implementation on MATLAB Simulink, has also accelerated the validation and development processes. This study aimed to use these three parts together and aimed to develop the underlying algorithm. Meanwhile, it aims to provide readers with the opportunity to observe how effective and functional the Model Composer is during validation and validation.
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ÖgeSurface acoustic wave resonator characterization for gas and liquid detection(Graduate School, 2024-07-12)Surface Acoustic Wave (SAW) resonators have garnered significant interest in recent years due to their advantageous properties, including high Q-factor, low power consumption, and compact size, making them ideal candidates for various sensor applications. SAW resonators can be used as material detection devices since manipulations to the substrate along the delay line can alter the characteristics of the device. The objective of the study is to determine the characteristics of a SAW resonator based network when it is exposed to gasses and liquids for sensor applications. Several versions of PCBs are manufactured for the resonator measurements. These PCBs are customized according to the shape of the resonator. Some of the PCBs are then further customized to incorporate multiple signal lines from the same resonator with the help of switches. Resonators are wire bonded in order to connect them to PCBs thus reducing the chances of damaging during measurements. Wire bonding process was optimized through experimentation with already damaged wafers or test wafers. Through the use of a Vector Network Analyzer (VNA), S parameter information were obtained under different conditions for various resonators. Firsly VNAs were calibrated for desired frequency range and parasitic cable effects were removed. Measurements for resonators were taken as a baseline with just the bondwires and the PCB. Same measurements were repeated in a Faraday cage with lights turned off to see the effects of light and noise on the resonator. Resonators were then coated with 2 different sensing materials Phthalocyanine and Polyvinylpyrrolidone (PVP). After coating the resonators same measurements were repeated on both bandpass and bandstop filtering behavior resonators to acquire data. Acquired data were then used to create a model filter then simulated with Colpitts Oscillator configuration to see frequency selectivity. The results showed that noise and light effects were minimal on the resonators since data from Faraday cage and baseline measurements were almost identical. It was observed that even coating resonators with a sensing material changed the behavior of the resonator within the ranges of the kilohertz. Additionally, since PVP also interacts with moisture, the effectiveness of the coating was observed by blowing on to the resonator and observing frequency shifts.