GF 22nm FDSOI power management unit with integrated SRAM design

Abstract

The primary objective of the research presented in this dissertation is to design PMU and SRAM circuits for space and lidar applications. This PMU block is able to provide the whole power supply necessary for any SoC application, even in harsh temperatures (i.e., 150 °C), making it appropriate for space applications, and it can only do so by acquiring a worldwide supply. In addition, this worldwide supply has a wide range, ranging from 1.8V to 3.6V. Unique in that it automatically adjusts itself across this full range. Furthermore, despite offering all these advantages, it never sacrifices its economy or performance standards. The thesis is structured as follows: In Chapter 2, the stages from the fundamental information about the SRAM architecture to the design of the structure anticipated to be employed in the project will be discussed. This chapter will also feature the simulation findings from SRAM. The SRAM array system is built with GF Fully Depleted Silicon on Insulator (FD-SOI) 22nm CMOS technology and a 0.85 V power supply. According to the DC characteristic curves of the SRAM cell, the SNM is 0.216 V during the read operation and 0.383 V during the write operation. Read and write operations are performed at a rate of 2 GHz. The entire power consumption is 3.6 mA, and the total layout area is 0.213 x0.273 µm x µm. In Chapter 3, the fundamental supply sources that will be utilized in the Buck Converter and supplying the analog blocks in the PMU, which we refer to as the internal PMU, will be analyzed in depth. Detailed simulation results and their interrelationships will be presented. The internal power management sub-blocks will be discussed. These blocks are a Bandgap Reference circuit (BGR) and three different Low-Dropout regulators (LDOs): a protected high-voltage LDO, a companying always-ON auxiliary LDO and a current sink LDO for power converter level shifters. The system power supply ranges from 1.8 V to 3.6 V, so that it can be used for a wide range of tasks. The system automatically adjusts itself according to the provided supply level. The BGR produces a process, supply voltage, and temperature (PVT), a stable reference voltage, and current to produce bias for high-voltage LDO and other system blocks. The high-voltage LDO takes in a wide range of input supply voltages and always produces 1.8V output. The sink LDO generates the tracking level shifter voltage for digital driver circuits and adjusts automatically according to supply voltage to keep transistors in the Safe Operating Area (SOA). The auxiliary BGR and auxiliary LDO are extremely low power, and they used to overcome "chicken-and-egg" problems by providing a coarse, always-on output level that was overtaken by the main LDO when the system was powered up. The proposed project is designed and simulated in a 22-nm FD-SOI, and the layout area is 292.4 µm x 98.3 µm. In Chapter 4, we'll talk about the Buck Converter, which is the last part of the PMU. It will provide the Buck Converter's employed methodology, circuits, and simulation results. This section talks about a dual-mode DC-DC buck converter with a gate size control that can be changed based on the load current for digital systems or systems where noise doesn't matter. For light-load applications, a selective adaptive on-time pulse frequency modulation (PFM) control is presented to achieve maximum power efficiency by determining the optimal switching frequency based on the load current, thereby minimizing unneeded switching losses. When the inductor peak current value or converter output voltage ripple is taken into account, the on-time can be modified further in some cases. In heavy-load applications, a typical control method called pulse width modulation (PWM) is used with power gates that can be changed to make sure efficiency over a wide range of currents. A dual-mode buck converter prototype is simulated using a 22 nm CMOS FDSOI technology, attaining a reported 92.0% efficiency across the current range from 10 mA to 8 A. The conclusion is found in Chapter 5. This chapter summarizes the research's results and contributions. The audience is also told what kind of research might be done in the future based on what has already been found.