Implementation of a super-resolution algorithm using model composer

Abstract

Today, the advancement of technology has multifaceted effects. The effects of these advancements can be given as examples of the increase in resolution and detail in the vision sensor systems at the front end, the developments in hardware and integrated technologies at the middle level, and, in the back end, the innovations in the implementation and testing stages of the compilers that program these hardware and integrations. Especially in the last ten years, developments in internet and image compression algorithms and devices such as televisions, smart phones and computers with image playback capability have increased the features such as the resolution and detail in the image. Although these developments can be followed by current cameras and image detection devices produced today, it is obvious that the resolution of the videos and photos recorded in the past should be increased. Meanwhile, basic and simple mathematical convergence solutions such as bilinear and bicubic interpolation are frequently used. However, these algorithms do not have the ability to increase information such as continuity, detail and sharpness in images with the weighted averaging basis they use. For this reason, special solutions aiming to increase the mentioned features have been produced. These solutions are called super-resolution imaging. Field Programmable Gate Arrays (FPGAs), which allow experimentation during prototyping and algorithm development with their ability to be reconfigured with hardware improvements, have also become useful for the implementation of algorithms with large dimensions and high computational needs. Although the development of the configuration files for these ICs is primarily done through IDEs that convert HDL codes to bitstreams, background compiler developments have also accelerated. Vivado High Level Synthesize compilers based on C/C++ programming languages have been used since 2014. The Model Composer extension, which is based on this compiler and provides FPGA implementation on MATLAB Simulink, has also accelerated the validation and development processes. This study aimed to use these three parts together and aimed to develop the underlying algorithm. Meanwhile, it aims to provide readers with the opportunity to observe how effective and functional the Model Composer is during validation and validation.