Tümdevre üretiminde polisilisyumun plazma ortamında aşındırılması

dc.contributor.advisor Meriçboyu, Ayşegül
dc.contributor.author İlyas, Sema İmrahor
dc.contributor.authorID 55583
dc.contributor.department Kimya Mühendisliği tr_TR
dc.date.accessioned 2023-03-16T05:57:05Z
dc.date.available 2023-03-16T05:57:05Z
dc.date.issued 1996
dc.description Tez (Yüksek Lisans) -- İstanbul Teknik Üniversitesi, Fen Bilimleri Enstitüsü, 1996 tr_TR
dc.description.abstract Tümdevre üretiminde, tranzistorların elektriksel özelliklerini belirleyen en önemli parametre geçit uzunluğudur. Geçit mazemesi olarak kullanılan polisilisyumun, bir maske malzemesi ile belirlenmiş desenler oluşturulacak şekilde aşındınlması geçit uzunluğunu belirler. Sunulan çalışmada, polisilisyumun aşmdırılmasında SF6-CI2 gaz karışımı kullanılarak plazma destekli reaktif iyon aşındırma tekniği uygulanmıştır. Gaz akışı, gaz kompozisyonu, reaktör basıncı ve güç değiştirilerek aşındırmanın, uniform aşınma hızı, yönbağımlılık, silisyumdioksite olan seçicilik ve doğru desen aktarımı özellikleri incelenmiştir. Yapılan deneyler sonunda; 1. Gaz karışımında klor oranının artması ile yönbağımlılığın arttığı, 2. Basınç azalırken yönbağımlılığın arttığı fakat seçiciliğin azaldığı, 3. Gücün artması ile maske malzemesi aşınma hızının arttığı ve seçiciliğin azaldığı, 4. Gaz akış hızı ile seçiciliğin arttığı fakat yönbağımlılığın azaldığı görülmüştür. Aşındırma sonunda elde edilen polisilisyum yapıların boyutları ölçülerek belirlenen değere göre sapma miktarı ve boyut üniformitesi incelenmiş, kesitler, Taramalı Elekton Mikroskobunda görüntülenerek yönbağımlılık özelliği belirlenmiştir. Deneyler sonucu belirlenen optimum süreç parametreleri, aşındırma işleminin ve işlem sonunda şekillenen geçitin, VLSI çapında tümdevre teknolojisi gereksinimlerini büyük ölçüde karşılayacak nitelikte olmasını sağlamaktadır. tr_TR
dc.description.abstract An integrated circuit is a collection of electronic circuits made by simultaneously forming individual transistors, diodes, and resistors on a small chip of semiconductor material, typically silicon, that are intraconnected to one another with a metal, such as aluminum, deposited on the chip surface. Since the creation of the first integrated circuit in 1960, there has been an ever increasing density of devices manufacturable on silicon substrates. The number of devices manufactured on a chip exceeded the generally accepted definition of very large scale integration ( VLSI; 100.000 devices per chip). By 1996, this number is around 109 per chip. The increasing device count was accompanied by a shrinking minimum feature size, which is less than 0.7 \im in today's technologies. In the production of integrated circuits, five main processes are applied on silicon wafers. These are; 1) thermal processes, 2) ion implantation, 3) photolithography, 4) etching and 5) deposition of layers. After, the design is completed, a circuit is laid out. The layout consist of sets of patterns that will be transferred to the silicon wafer which correspond to device regions, or interconnect structures. These patterns are sequentially transferred to the wafers through the use of photolithographic processes and set of masks, as part of the wafer fabrication sequence. The result of each pattern transfer step is a set of features created on the wafer surface. These features are generally either in the form of: a) an etched opening in a film (or region of the substrate); or b) a patterned feature of a film present on the surface ( e.g. an interconnect line or pad ). After the openings are created by the pattern transfer step, either controlled quantities of dopant are added to the silicon substrate through the openings, or another layer is deposited. The major integrated circuit technology in terms of device structure is CMOS ( Complementary Metal Oxide Silicon ) technology comprising of NMOS and PMOS transistors together. A MOS transistor consists of a gate and source - drain regions in an area surrounded by silicondioxide for isolation. The gate length is a critical, fine line dimension that determines the channel length of the devices and electrical characteristics of a transistor depend on channel length. Since polysilicon usually serves as a gate material, it is thus paramount that the etched linewidth dimension faithfully reproduce the dimension on the mask (e.g. to within ±5%). A polysilicon etch process must exhibit excellent linewidth control, and high uniformity of etching. In this thesis, polysilicon etching for the integrated circuit fabrication carried on TÜBİTAK Semiconductor Technologies Research Laboratory (YITAL) was characterized and dry etching parameters of it were optimized using Reactive Ion Etching system with SF6 - Cl2 gas mixtures. Before the experiments were explained, some principles of etching were given and dry etching methods were described. The properties of plasma which are the basis for dry etching and reactive ion etching were also mentioned. Etching in microelectronics fabrication is a process by which material is fully or partially removed from thin films on the substrate surface. The overall goal of an etch process is to reproduce the features defined by a masking material ( usually photoresist ) with high fidelity. There are some basic concepts in etching, which are etch rate, selectivity, anisotropy and loading effect. Etch rate : The rate at which material is removed from the film by etching is the etch rate and expressed in A/sec or p/min. Selectivity : The ratio of etch rates of different materials is defined as the selectivity of an etching process. Thus both: 1) the selectivity with respect to the masking material; and 2) the selectivity with respect to the substrate materials are important characteristics of an etch process. Anisotropy : When etching can proceed in all directions at the same rate, it is said to be isotropic. If etching proceeds exclusively in one direction, the etching process is completely anisotropic. Loading effect : When the etch rate is dependent upon the amount of etchable surface exposed to the etchant, the phenomenon is called a loading effect. An etching process can be wet or dry. Wet etching is realized by dipping the substrate in a suitable liquid etchant. Although wet etching shows excellent selectivity, it is generally isotropic and with continuously decreasing lateral dimensions, limits the density of circuit elements on a chip. Thus, wet etching is inadequate for defining features less than about 3|j.m wide. Dry etching is a plasma assisted etching which denotes several techniques that use plasmas in the form of low-pressure gaseous discharges. Dry etching is commonly used in VLSI processing because of its potential for high fidelity transfer of patterns. A dry etching process can have a physical basis ( e.g. glow discharge sputtering ), a chemical basis ( e.g. plasma etching ), or a combination of two ( e.g. reactive ion etching ). In processes that rely. predominantly on the physical mechanism of sputtering, the directional nature of the incident energetic ions allows substrate material to be removed in a highly anisotropic manner, but it is non-selective against both masking material and materials underlying the layers being etched. Furthermore, since the ejected species are not inherently volatile, redeposition can occur on the sidewalls of the etched feature. Dry processes relying strictly on chemical mechanisms for etching can exhibit very high selectivities against both mask and underlying substrate layers. However, such mechanisms typically etch in an isotropic fashion, similar to wet etching. Dry etch processes based on a combination of physical and chemical mechanisms offer the potential of controlled anisotropic etching, together with adequate selectivity. Reactive ion etching involves using a glow plasma to generate chemically reactive species from relatively inert molecular gases. These reactive species VI combine chemically with certain solid materials to form volatile compounds which are removed by the vacuum pumping system. A plasma is a partially ionized gas composed of nearly equal quantities of positive and negative charges ( electrons and positive and negative ions ) produced by low pressure electric discharges. When an electric charge is applied to a gas, the gas breaks down. An electron realized by some means such as photoionization is accelerated by the applied field and gains kinetic energy. But it loses energy in collisions with gas molecules. Collisions can be elastic or inelastic. Elastic collisions deplete very little of the electrons energy, because of great mass difference between electrons and molecules. In inelastic collisions, the electron energy becomes high enough to excite or ionize a molecule, and ions, atoms, free radicals and metastable species are formed. These products are the primary precursers which produce etching by physical and chemical interactions with solid surfaces. Electrons realized in ionizing collisions are lost from the plasma by drift or diffusion to the boundaries, by recombination with positive ions. The discharge reaches a self-sustained steady state when electron generation and loss processes balance each other. The density of the charged particles in plasma ranges from 109 - 1011/cm3, and the fraction of ions-to-neutral species is 10"4 - 10. The average energies of electrons is between 1 - 10 eV. Weakly ionized discharges results in a gas temperature near ambient, despite a mean electron temperature of about 1 04 - 105K. A plasma can be sustained by dc or ac supplies, but in plasma etching systems, high frequency (13.5 MHz) rf diode configurations are primarily used. Three advantages are realized with rf discharges; first, electrons can pick up sufficient energy during their oscillations in the gap to cause ionization. Second, the probability of ionizing collisions is enhanced by electron oscillations allowing operation at pressures as low as 10"3 Torr. The third advantage is that electrodes within the discharge can be covered with insulating material. In an rf configuration, the potentials that develop on the electrodes ( one of them is driven and the other is grounded ) are negative with respect to the plasma. This is due to much smaller mass of electrons compared to that of ions and provides the ions being accelerated toward the cathode. Since the ion flux is the same to both of the electrodes, if the area of one of the electrodes is kept rather smaller than that of the other, potential drop on the former will be much more than the latter and this drop is called as self-bias voltage. Reactive ion etching systems are based on this configuration. The substrate being etched is placed on the small driven electrode and the reactor chamber wall is the big electrode and is grounded. In this way, substrates are exposed to energetic ion bombardment. In plasma etching systems which proceeds completely in a chemical way, the areas of the electrodes are the same and substrates are placed on the grounded electrode. The processes taking place in an reactive ion etching system can be given as follows: a) Reactive species are generated in the plasma by electron-impact dissociation / ionization, such as radicals, positive and negative ions, electrons and neutrals. b) A DC bias is formed for ion acceleration. VII c) Plasma-generated reactives are transported from bulk of the plasma to the surface of the material being etched by diffusion. d) Reactive radicals are adsorbed on the surface of the material to be etched. This step can be strongly enhanced by concurrent ion bombardment which serves to produce active sites. e) A chemical reaction occurs between the adsorbed species and the material to be etched with the formation of a volatile by-product, be greatly enhanced by ion f) The by-product is desorbed from the surface into the gas phase. The volatility of the by-product makes this step critical and ion bombardment can accelerate the desorbtion. g) The desorbed species diffuse into the bulk of the gas and are pumped out. Two principal mechanisms by which energetic ions assist in enhancing the etch rate produced by reactive gases have been postulated to be operative in directional etching process. They are: a) Relatively high energy impinging ions produce lattice damage at the surface being etched,. Reaction at these damaged sites is enhanced compared to reaction at surfaces where no damage has occurred; and b) lower energy ions provide enough energy to desorb nonvolatile polymer layers that deposit on the surfaces being etched. In processes where such polymer deposition occurs, surfaces not struck by the ions do not have the blocking layer removed, and hence they strike the bottom surfaces of the etched features, etched. As a result, the bottom of the features exhibit enhanced etching. These mechanisms also explain anisotropic edge profile obtained in reactive ion etching. Most semiconductor materials and metals are etched in halogen-containing gases in order to give volatile halide reaction products. Doped polysilicon is etched with fluorine based plasmas isotropically, and hence controlled anisotropic etching of Si with fluorine chemistries, such as CF4 or SF6 is difficult. Chlorine plasmas usually etch polysilicon anisotropically and. exhibit excellent selectivity over polysilicon, but etch rate is slower than fluorine-containing gases. Etch gases containing both chlorine and fluorine are preferred for polysilicon etching providing high etch rates and good selectivity over Si02. Bromine-containing gases are also used, often with good results. In this work, Cl2 and SF6 gases were chosen to etch the doped polysilicon in a reactive ion etch system. The silicon wafers used have a diameter of 100 mm and a resistivity of 15 - 25 ohm cm. First an oxide has been grown on the wafers, thermally, and then polysilicon was deposited in an LPCVD system at 873 K, 230 mTorr by the decomposition of silane. The deposited polysilicon thickness was 3500 - 5000 A. Doping of polysilicon was realized, first, by the growth of phosphor-rich silicondioxide on poly in APCVD system and later, by the diffusion of phosphor at 1 000 C in oxygen and nitrogen ambient. The resistivity of the polysilicon obtained is. in the range of 11 - 18 Ohm cm. Before the etching, a photolithograpic process has been applied to define the photoresist pattern on the wafers by using g-line stepper equipment and AZ-6212 photoresist material. The reactive ion etch system is from Oxford Plasmalab with two chambers, one for polysilicon and silicondioxide and the other for aluminum. Chambers can process single wafers. The vacuum pump is Leybold roots and blower type with fombline oil. The thickness of polysilicon and silicondioxide was measured in Manometries Measurement System operating using the principle of different VIII refractive indices of materials. An Alpha step profiler was also used to determine the photoresist thickness before and after the etching. The edge profiles of the etched features were observed by means of a scanning electron microscope, Jeol JSM 5800 and linewidth measurements on the wafers were also performed with this equipment.' In this work, for the doped polysilicon, dry etching parameters of total gas flow, gas composition, pressure and power were optimized in order to obtain a uniform etch rate ( <, 3%), a good selectivity to silicon dioxide ( > 10 ), a linewidth variation of < 0.5 and edge profiles with a wall angle of greater than 80°. Dry etching experiments were performed in four groups ; In the first group of experiments, CI concentration was varied between 10-90 %, keeping total gas flow flow, pressure and power constant. It was seen that as chlorine concentration was increased the etch rates obtained at the center and at the edge of the wafer were close to each other, thus etch rate uniformity becomes better. In the second group of experiments, pressure was varied under constant total gas flow, chlorine concentration and power. Etch rate decreased with pressure since reactants are removed from the reactor faster as pressure becomes lower. When edge profiles of the obtained features were examined, it was observed that the vertical etch rate increased, lateral etch rate decreased with both an increase in chlorine concentration and a decrease in pressure, Hence, at high chlorine concentrations and at low pressures, anisotropy is obtained. Etch rate of oxide under the polysilicon which determines the selectivity, decreased with an increase in chlorine,as it was required, but increased with a decrease in pressure. In the third group, another process parameter, power, was also changed between 85 and 200 Watt. At high power, the etch rate of photoresist increased and photoresist was deformed. Selectivity also became worse. At low values of power, selectivity was obtained as greater than 10, however anisotropy couldn't be obtained. In the last group of experiments, total gas flow was changed keeping three other parameters constant. As flowrate was increased, polisilicon etch rate increased and oxide etch rate decreased, hence selectivity became better, but anisotropy decreased. At low values of flowrate, photoresist disturbed As a result, optimum process parameters were determined as, Total gas flow : 20 seem Chlorine concentration : 90 % Pressure : 40 mTorr Power: 120 Watt IX After the etching of polysilicon on the wafer under optimum conditions with SF6 - Cl2, the following results were obtained; Etch rate uniformity :2.5% Selectivity to oxide : 7.6 : 1 Anisotropy : a > 80° Linewidth variation : % 3.68 Linewidth uniformity: % 2.1 Results provide the VLSI requirements except the selectivity which is less than 10. However, the selectivity can be increased applying a process with two steps, decreasing the power in the second step. en_US
dc.description.degree Yüksek Lisans tr_TR
dc.identifier.uri http://hdl.handle.net/11527/23290
dc.language.iso tr
dc.publisher Fen Bilimleri Enstitüsü tr_TR
dc.rights Kurumsal arşive yüklenen tüm eserler telif hakkı ile korunmaktadır. Bunlar, bu kaynak üzerinden herhangi bir amaçla görüntülenebilir, ancak yazılı izin alınmadan herhangi bir biçimde yeniden oluşturulması veya dağıtılması yasaklanmıştır. tr_TR
dc.rights All works uploaded to the institutional repository are protected by copyright. They may be viewed from this source for any purpose, but reproduction or distribution in any format is prohibited without written permission. en_US
dc.subject Polisilisyum tr_TR
dc.subject Tümdevre tasarımı tr_TR
dc.subject Polysilicon Integrated circuits design en_US
dc.title Tümdevre üretiminde polisilisyumun plazma ortamında aşındırılması tr_TR
dc.type Tez tr_TR
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