Synthesis and Optimization of Switching Nanoarrays
Synthesis and Optimization of Switching Nanoarrays
dc.contributor.author | Morgul, Muhammed Ceylan | |
dc.contributor.author | Altun, Mustafa | |
dc.contributor.department | Elektronik ve Haberleşme Mühendisliği | tr_TR |
dc.contributor.department | Electronics and Communication Engineering | en_US |
dc.date.accessioned | 2019-05-22T08:57:11Z | |
dc.date.available | 2019-05-22T08:57:11Z | |
dc.date.issued | 2015 | |
dc.description.abstract | In this paper, we study implementation of Boolean functions with crossbar nanoarrays where each crosspoint behaves as a switch. This study has two main parts “formulation” and “optimization”. In the first part of formulation, we investigate nanoarray based implementation methodologies in the literature. We classify them as two-terminal or four-terminal switch based. We generalize these methodologies to be applicable for any given Boolean function by offering array size formulations. In the second part of optimization, we focus on four-terminal switch based implementations; we propose a synthesis method to implement Boolean functions with optimal array sizes. Finally, we perform synthesis trials on standard benchmark circuits to evaluate the proposed optimal method in comparison with previous nanoarray based implementation methods. The proposed synthesis method gives by far the smallest array sizes and offers a new design paradigm for nanoarray based computing architectures. | tr_TR |
dc.description.sponsorship | This work is part of a project that has received funding from the European Union’s H2020 research and innovation programme under the Marie Skłodowska-Curie grant agreement No 691178, and supported by the TUBITAK-Career project #113E760 | en_US |
dc.description.version | Author accepted manuscript(AMM) | |
dc.identifier.citation | M. C. Morgul and M. Altun, "Synthesis and Optimization of Switching Nanoarrays," 2015 IEEE 18th International Symposium on Design and Diagnostics of Electronic Circuits & Systems, Belgrade, 2015, pp. 161-164. doi: 10.1109/DDECS.2015.51 | en_US |
dc.identifier.uri | http://hdl.handle.net/11527/18007 | |
dc.language.iso | en | tr_TR |
dc.publisher | IEEE | tr_TR |
dc.relation | 2015 IEEE International Symposium on Design and Diagnostics of Electronic Circuits and Systems (DDECS) | en_US |
dc.relation.ispartofseries | Synthesis and Performance Optimization of a Switching Nano-Crossbar Computer (NANOxCOMP) | en_US |
dc.source.uri | http://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=7195691&isnumber=7195649 | |
dc.subject | Switching nanoarrays | en_US |
dc.subject | Logic synthesis | en_US |
dc.subject | Optimization | en_US |
dc.title | Synthesis and Optimization of Switching Nanoarrays | en_US |
dc.type | Conference Paper | en_US |
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