Synthesis and Optimization of Switching Nanoarrays

dc.contributor.authorMorgul, Muhammed Ceylan
dc.contributor.authorAltun, Mustafa
dc.contributor.departmentElektronik ve Haberleşme Mühendisliği
dc.contributor.departmentElectronics and Communication Engineering
dc.date.accessioned2019-05-22T08:57:11Z
dc.date.available2019-05-22T08:57:11Z
dc.date.issued2015
dc.description.abstractIn this paper, we study implementation of Boolean functions with crossbar nanoarrays where each crosspoint behaves as a switch. This study has two main parts “formulation” and “optimization”. In the first part of formulation, we investigate nanoarray based implementation methodologies in the literature. We classify them as two-terminal or four-terminal switch based. We generalize these methodologies to be applicable for any given Boolean function by offering array size formulations. In the second part of optimization, we focus on four-terminal switch based implementations; we propose a synthesis method to implement Boolean functions with optimal array sizes. Finally, we perform synthesis trials on standard benchmark circuits to evaluate the proposed optimal method in comparison with previous nanoarray based implementation methods. The proposed synthesis method gives by far the smallest array sizes and offers a new design paradigm for nanoarray based computing architectures.
dc.description.sponsorshipThis work is part of a project that has received funding from the European Union’s H2020 research and innovation programme under the Marie Skłodowska-Curie grant agreement No 691178, and supported by the TUBITAK-Career project #113E760
dc.description.versionAuthor accepted manuscript(AMM)
dc.identifier.citationM. C. Morgul and M. Altun, "Synthesis and Optimization of Switching Nanoarrays," 2015 IEEE 18th International Symposium on Design and Diagnostics of Electronic Circuits & Systems, Belgrade, 2015, pp. 161-164. doi: 10.1109/DDECS.2015.51
dc.identifier.urihttp://hdl.handle.net/11527/18007
dc.language.isoen
dc.publisherIEEE
dc.relation2015 IEEE International Symposium on Design and Diagnostics of Electronic Circuits and Systems (DDECS)
dc.relation.ispartofseriesSynthesis and Performance Optimization of a Switching Nano-Crossbar Computer (NANOxCOMP)
dc.source.urihttp://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=7195691&isnumber=7195649
dc.subjectSwitching nanoarrays
dc.subjectLogic synthesis
dc.subjectOptimization
dc.titleSynthesis and Optimization of Switching Nanoarrays
dc.typeConference Paper

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