Biyolojik işaretlerin gelişmiş bir sayısal işaret işlemcisiyle işlenmesi

Abstract

Günümüzde gittikçe gelişen ve yaygınlaşan sayısal elektronik işaret işleme konusunda da etkin çözümler sunmaktadır. Özellikle programlanabilen sayısal işaret işleyici Terdeki gelişmelerin boyutları göz kamaştırmakta ve bir çok alanda yerini almaktadır. Bu çalışmada da, gelişmelere paralel olarak böyle bir sayısal işaret işleyicinin biyolojik işaretlerin işlenmesinde kullanılması amaçlanmıştır.Seçilen sayısal işaret işleyici ise kayan-noktalı işlem yeteneğine sahip, Texas Instruments firmasına ait TMS320C30 dur. Bölüm 2' de frekans domeni analizinde çok önemli yer tutan Fourier dönüşümü ve ayrık Fourier dönüşümü incelenmektedir.Ayrık Fourier dönüşümünde karşımıza çıkan çeşitli problemler ele alınarak çözüm yolları irdelenmektedir. Bölüm 3' de ise TMS320C30 sayısal işaret işleyicisinin donanım ve yazılım özellikleri incelenmektedir. Hızlı Fourier dönüşümünü Radix-2 algoritması yardımıyla bulan bir programın geliştirilmesi ise Bölüm 4' de yer almaktadır.

Most of the signals of interest in biomedicine are continuous (analog) : namely, they are defined over a continuous range of the variable. Modern digital technology, both in terms of hardware and software, make discrete time processing advantageous over analog processing. The advantages are such that usually it's worthwhile to convert the analog signal into a discrete one so that discrete processing can be applied. Some of the main tasks of digital signal processing are to apply filtering, to estimate various signal parameters, and to perform transformations of the signal (i.e. Fourier Transforms). When the results of the processing are not required immediately following the signal, off line processing methods are used. When results are required during and immediately after the signal sample has been acquired, real-time or on-line processing methods are used. Depending on the application, the processing time and the size of memory required are of importance in digital signal processing. Off-line processing can be performed on general purpose computers. Real-time processing usually requires special dedicated machines or systems such as fast correlators, dedicated Fourier Transform machines, array processors, hardware multiply-accumulate circuits or programmable digital signal processors. The development of such compact signal processors has significance comparable to the introduction of microcomputers ; Computing was no longer solely the domain of computer specialists. However, before we can make best use of them, we must first understand the fundamentals of digital signal processing. In expensive, easily available DSP processors can contribute to numerous applications in a variety of fields, for example: * Instrumentation and measurement : correlators, signal averagers, filters * Communications : voice and data communication, modems -v- * Digital audio * Graphics : CAD, medical imaging * Navigation : radar and sonar * Control : robotics, machine vision * Computations Electrical systems and the signals they deal with have measurable responses as time histories in th time domain, but they can be transformed for study in the frequency domain to yiela further information. In a Doppler ultrasound, for example, the echo time yields the blood velocity and the frequency shift. These spectra may act as fingerprints, specific to a given entity, which can be used to monitor performance and detect abnormalities. We shall see that improved algorithms such as FFT, allow spectral analysis for large amounts of data to be performed in real time. In this study, we are dealing with frequency domain techniques especially FFT. Discrete Fourier transforms (DFTs) are important tools in digital signal processing, they are used to compute the Fourier Transform with discrete frequency intervals. Straigthforward evaluation of them is excessively time consuming, but Fast Fourier Transforms (FFTs), among the most powerful general purpose DSP algorithms, provide a means of greatly speeding up DFT computations. The FFT is not an approximation to the DFT but a family of algorithms, the results are the same, but computation (for N points) is reduced from N*N to N/2 log(N) multiplications. For a 1000 point transform, speed is typically improved by a factor of 200. The Discrete Fourier Transform (DFT) is the discrete-time version of the continuous-time Fourier transform. The continous-time Fourier transform or frequency spectrum of an analog signal x(t) is +« X(f) = f x(t) exp(-j2ttft) dt where, in general, both x(t) and X(f) are complex functions of the continuous-time variable t and the frequency variable f, respectively. On the other hand DFT is shown as follows: N-l nk X(k) = Z x(n)W n=0 N n=0,l,N-1 k=0,l,,N-1 -vi- where W = exp(-j2itkn/N) is known as twiddle factor. N A more efficient method of computing the DFT that significantly reduces the number of required arithmetic operations is the so-called decimation-in-time (DIT) FFT algorithm. With the FFT, N is a factorable number that allows the overall N-point DFT to be decomposed into successively smaller and smaller transform. The size of the smallest transform thus derived is known as the radix of the FFT algorithm. Thus, for a radix-2 FFT algorithm, the smallest transform or " butterfly s* (basic computational unit) used is the2-point DFT. The number of arithmetic operations can be reduced initially by decomposing the N-point DFT into two N/2-point DFTs. This means that the input time sequence x(n) is decomposed into two subsequences, which consist of its even-numbered and odd-numbered sampleswith the indices expressed mathematically as 2n and 2n+l, respectively. Substituting these time indices into the original DFT equation gives N/2-1 2nk N/2-1 (2n+l)k X(k) = Z x(2n)¥ + 2 x(2n+l)¥ n=0 N n=0 N N/2-1 2nk = 2 x(2n)W n=0 N k N/2-1 2nk i. I x(2n+l)¥ N n=0 N After some manipulation this equation becomes X(k) = Y(k) + ¥ Z(k) N X(k+N/2) = Y(k) - ¥ Z(k) N k=0,l N/2-1 Consequently, to arrive at the final radix-2 DIT FFT algorithm, this decimation process is repetitively carried out until eventually the N-point DFT can be evaluated as a collection of 2-point DFTs or butterflies. We show ways to avoid the pitfalls of the DFT: aliasing, leakage and the picket fence effect. Aliasing is eliminated by proper filtering of the analog signal. Leakage is due to the finite data record or window, which effectively multiplies the signal by a rectangle and thus convolves each spectral peak with sinf/f. A longer signal record can lessen the leakage. The picket fence effect closely related to leakage. This produces a ripple in the amplitude of DFT. Longer records, smoothing windows or even adding zeros to the record, produce a cure. A signal observed for a finite interval of time (window) may have distorted spectral information in the Fourier transform due to the ringing of sinf/f spectral peaks of the rectangular window. To avoid or -vi i- minimize this distortion, a signal is multiplied by a window-weighting function before the DFT is performed. Window choice is cruical for seperation of spectral components which are near one another in frequency or where one component is much smaller than another. The choice of window function is an art; it depends upon the designer's skill at manipulating the tradeoffs between the various constraints, depending on what one wants to get out of the spectrum or its inverse. Some of the popular windows are rectangle, triangular, Gaussian, Cosine Bell, Hamming, Hanning, Blackman, and Kaiser-Bessel. On the other hand, digital signal processing is computationally intensive; it requires many multiplication and additions. To a range of approaches are commonly used to implement DSP algorithms. They represent various degrees of hardware-software optimization. 1. Software and general -purpose microprocessor develops a bottleneck because of time required for multiplication in software. 2. Coprocessor, multipliers, and multiplier /accumulators as on-the-bus micriperipherals offload computation-intensive tasks. 3. Hardware- intensive solutions - e.g. processor systems with paraleli operation; microcoded system- minimize the number of cycles to execute a DSP program. 4. The programmable single-chip digital signal processor combines software flexibility with DSP hardware power. While (1) and (2) are moderate extensions of conventional microprocessor systems, (3) tends to link the most hardware to achieve the fastest performance at highest cost, while (4) unbottlenecks conventional microprocessor architecture for high DSP throughput at moderate cost. TMS320C30 (third generation ) Digital Signal Processor is a high performance CMOS 32-bit device in the TMS320 family of single chip signal processors. Some key features of the TMS320C30 are listed below. * 60 ns single cycle instruction cycle - 33,3 MFLOPS - 16.7 MIPS * On-chip ROM block (4K*32-bit) * On-chip RAM block (lK*32-bit) * 64*32-bit cache * 32-bit instruction and data words, 24-bit address * 40/32-bit floating-point/integer multiplier and ALU * 32-bit barrel shifter. * DMA operation * Two and three operand instructions * Paraleli instructions * Block repeat capability * Zero overhead loops * Interlocked operations for multiprocessings * Two serial ports to support 8/16/32-bit tarnsfers * Two 32-bit timers -viii- The TMS320C30 has a register-based CPU architecture. The CPU consists of the following components. * Floating-point/integer multiplier * ALU for performing arithmetic (floating-point, integer) and logical operations * 32-bit barrel shifter * Internal buses (CPU1/CPU2 and HEG1/REG2) * Auxiliary register arithmetic units (ARAUs) * CPU register file The multiplier performs single-cycle multiplications on 24-bit integer and 32-bit floating-point values. The TMS320C30 implementation of floating-point arithmetic allows for floating-point operations at fixed-point speeds via a 60-ns instruction cycle and a high degree parallelism. To gain even higher throughput, a multiply and ALU operation can be performed in a single-cycle by using parallel instructions. The ALU performs single-cycle operations on 32-bit integer, 32-bit logical, and 40-bit floating-point data, including single-cycle integer and floating-point conversions. Barrel shifter is used to shift up to 32 bits left or right in a single cycle. The TMS320C30 supports a base set of general purpose instructions that are particularly suited for digital signal processing and other numeric-intensive applications. Five groups and addressing modes are provided on TMS320C30. Six types of addressing may be used within groups in the following list. * General addressing modes: - Register - Short immediate - Direct - Indirect * Three-operand addressing modes - Register - Indirect * Parallel addressing modes - Register - Indirect * Long-immediate addressing mode - Long immediate * Conditional branch addressing modes - Register - PC-relative In Chapter 2, basics of the FFT and DFT are explained, and the problems encountered in DFT is described. In Chapter 3, the hardware and software features of TMS320C30 are explained. The last Chapter 4 is dealth with Radix-2 Decimation-in-time FFT algorithm implementation using TMS320C30 assembly language. At the same time a new algorithm called as Split-Radix will be explained.