2-8 MBit7s fiber optik hat teçhizatı arayüz devresinin sahada programlanabilir kapı dizisi ile tasarlanması ve gerçeklenmesi

Abstract

Santraller arasına kurulan fiber optik haberleşme sistemlerinde, Sayısal Çoklama Sistemlerinin giriş ve çıkışındaki sayısal işaretleri fiber optik iletişim ortamına uyarlamak için Fiber Optik Hat Teçhizatı kullanılır. Teçhizatın temel birimi olan Arayüz devresi ile, koaksiyal kabloda taşınabilen HDB3 kodlu elektriksel işaret ve fiber optik kabloda taşınabilen CMI kodlu işaret arasında kod dönüşümü yapılır. Bu tezde, 2 Mbit/s ve 8 Mbtt/s Sayısal Çoklama Sistemi ile fiber optik iletişim ortamı arasında bağlantıyı sağlayan Fiber Optik Hat Teçhizatı Arayüz Devresi, sigorta oluşturma teknolojisine dayalı Sahada Programlanabilir Kapı Dizisi ile tasarlanmış ve gerçekleşmiştir. Halen Teletaş'ta üretilmekte olan, analog ve hibrit devreler ile ayrık elemanların kullanıldığı arayüz devresini, tek bir tümdevreye sığdırmak hedeflenmiştir. Baskılı devre alanı, güç tüketimi ve maliyet azalması amaçlanmıştır. Sayısal sistem tasarımında kullanılan Programlanabilir Kapı Dizilerinin, sayısal mantık ürün grubundaki yeri kollara ayrılarak tanıtılmış ve mimari yapılan ile özellikleri birbirlerine göre karşılaştırılarak incelenmiştir. Sigorta oluşturma teknolojisine dayalı Sahada Programlanabilir Kapı Dizisinin özellikleri, mimari yapısı ve tasarım kuralları ayrıntılı olarak açıklanmıştır. Ürünü geliştirmekte kullanılan, Vievvlogic şematik tasarım programı ile ALS yazılımı, adım adım tanıtılmıştır. Sayısal haberleşme sisteminin temelini oluşturan sayısal çoklama sistemleri, sayısal haberleşmede kullanılan kodlama yöntemleri ve geleceğin haberleşme problemlerini çözümleyen fiber optik haberleşme tekniği ayrıntılı olarak açıklanmıştır. Fiber optik hat teçhizatı ve alt birimleri ile, arayüz devresini oluşturan alt devreler dalga şekilleri ile beraber incelenmiştir.

As the year 2000 approaches, we see more and more subscribers being connected to the central exchanges. This puts a burden on the communication links between the exchanges, so higher capaslties are needed. it is not practical to lay down twisted pairs of copper for each channel, since also crosstalk between channels will degrade communication quality. A solution to this would be to use the same communication link by a number of subscribers. Time division multlplexed analog samples can enable a number of subscibers to use the same communication link betvveen the exchanges. This technic enables different channels to access the communication media periodicly and öne at a time. On the receiver side the indMdual channels also access the communication media at the same periodic Intervals, thereby receiving the information that was addressed to them. If these analog samples are directly connected to the communication media they can be distorted by attenuation and corrupted by noise. This distortion and noise will limit the length of the cables that is to be laid. But if we take the analog samples and convert them to digital before appling them to the communication media, we can increase the noise margin signiflcintly. The reason for this is that by having only two leveis we can eliminate noise distortions by repeaters which are placed with appropriate distance spacing and wh!ch correct the effect of the noise. in the voice encoding scheme known as Pulse Code Modulation (PCM) a 300-3400 Hz speach signal is sampled at 8 kHz and encoded Into 8 bits forming a 64 kbit/s channef. 30 of these channels can be time division multiplexed into öne 2 Mbit/s bit stream to form the first ievel of the digital hierarchy. This 2 Mbit/s signal can be carried on either tvvisted wire pairs ör coaxial cables. The second level of this hierarchy is formed by time division multiplexing four of these 2 Mbit/s signals into öne 8 Mbit/s signal carrying 120 voice channels. Follovving a simllar procedure, we can multiplex four 8 Mbit/s channels to form the third level at 34 Mbit/s with 480 voice channels. The fourth level of this hierarchy is formed in the same way and has a bit rate of 140 Mbit/s with 1920 voice channels. The outputs of digital multiplexers can not be applied directly to the communication media. The NRZ (Non Retum to Zero) signal used within the multiplexer has to be adapted to this media. This adaptation process is known as üne coding and some of its properties are that it does not have a D.C. component, it allows easy clock extraction and permits line code violation detection. If the chosen communication media is copper this coding can be HDB3 (High Density Blpolar 3) ör if it is fiber based this code can be CMI ör MCMI. HDB3 and MCMI codes permit the operators to measure the quallty of the line while in the since because on the receiving side code vlolations can be dedected. The guality criteria for a communication system is bit error ratio. If logic values can not be sensed truly by the receiver, bit errors occur. Crosstalk, noise and jitter are some causes of false sensing. A number of communication media exist to carry this transmission hierarchy. Some of these are twisted wire (»irs, coaxial cables, microvvave and fiber optic cables. Tvvisted wire pairs can carry first level PCM signals, coaxial cable can be used forfirst.second and third level PCM hierarchies, microwave and fiber optic cable can carry any öne of the four PCM levels. Cost, band width, electromagnethic interference and ease of maintenance make fiber optic cables an ideal choice. Fiber optic cables are knovvn to be the best from transmission guality polnt of view amongst commercially available choices. The primary concem of communications industry Is to increase the amount of information transmitted över a medium reguiring less space. This concem leads to high operating frequencies, at vvhich, problems caused by ElectroMagnetlc interference (EMl), crosstalk and signal distortion become more troublesome with copper cables. Fiber optic offers many advantages över copper cable for betler signal integrity and information carrying capactty at higher transmission rates and longer transmission distances. The fiber optic cable is a thin, flexible glass ör plastic waveguide through vvhich light can be transmitted. The fiber optic transmission link has three maln parts: - Transmltter - Receiver - Interconnection System The transmitter converts electrical signal to light. it includes a light source such as an LED ör Laser Diode and an electronic circuit to drive it. The receiver converts light back to an electrical signal through a light detector and receiver circuit. The interconnection system consisting of fiber optics, connectors and associated hardware, provides the transmission medium betvveen transmitter and receiver. The advantages of fiber optics are as follovvs: - Wlde bandvvidth - Low loss - Electromagnetic immunity - Small size - Light vveight - Securrty -Safety The bandvvidth of fiber optics allovvs high data rates which means accomodation of a great number of voice channels över a single fiber, as well as efflcient use of the channels in computers and Local Area Netvvorks. (be) The fiber optics offering low attenuation of signals, allow long interconnections without the need for regeneration. Single-mode fibers have about 0.4 dB/km loss at 1300nm wavelength. Attenuation in a fiber optic does not increase wlth increasing modulation frequency as it does with copper cable. At high frequencies repeater spacing decreases only due to dlsperslon. The fiber optic Is not affected by electromagnetic fields. Therefore, signal distortion, crosstalk and ground loop problems do not exist even in electrically hostile envlronments. The fiber optic occupies considerably less space compared to its copper counterpaıt of eguivalent transmlssion capacity. Due to its light vveight, fiber optic is suitable for vveight sensitive applications such as aircraft. Optical fiber is a perfect transmlssion medium for secure communications since it does not emit electromagnetic energy. Optical fiber presents no spark hazards. Therefore, it is suitable for use in flammable ör explosive envlronments. Fiber Optic LJne Terminating Equipment (FOLTE) is used to interface fiber optic lines with digltal multiplexlng equipment. 8 Mbit/s FOLTE (2 Mbit/s FOLTE) is directly connected to a 120-Channel (30-Channel) digltal multiplexer. it Is used to transmlt an 8448 kbit/s (2048 kbit/s) line signal between two CCITT standardized interfaces över a single mode fiber optic. The system uses a laser diode with a center vvavelength between 1280 and 1330 nm as the light source and a PIN-FET receiver modüle as the detector. HDB3 coded balanced bipolar outputs of first and second level digital multlplexers are converted into MCMI coded light signals by FOLTE. On the receMng side the FOLTE converts these light pulses back into HDB3 encoded electrical signals. Also on the receive side MCMI code is used for measuring the qua!ity of the line and to carry service channel information. FOLTE is made up of the follovving cards: - interface Unlt - Optical Transmitter/Receiver Unit - Alarm & Service Channel Unlt - DC/DC Converter Unît The maln card on the FOLTE is the interface unit which converts from HDB3 to NRZ, from NRZ to MCMI, from MCMI to NRZ and from NRZ to HDB3. After the encoded signals are converted to NRZ, jrtter is removed by routing this signal through an elastic storage. The receiver side of the interface unit monitors and evaluates the code violations and informs the alarm and service unit of these violations. in the transmlt direction of the 8 Mbit/s (2 Mbit/s) interface Unit, HDB3 signal from D2 (D1) interface is regenerated to compensate for station cable loss up to 6 dB at 4224 kHz (1024 kHz). HDB3 stream Is converted into a MCMI coded signal. The timing Is extracted from the recelved signal. interface unit provldes an 8448 kbit/s (2048 kbit/s) MCMI coded signal to the transceiver unit. (x) In the receive direction, the signal from transceiver unit is decoded and converted into an HDB3 signal at the proper level for D2 (D1) interface. The timing signal for the decoding process is recovered. AIS signal for the transmit and receive directions is also generated. For calculation of the bit error rate the signal Is fed to the error counter. The different error rates 'BER 10E-3, 10E-4, 10E-6 loss of signal (receive)' are processed in different counters. When the error rates are reached, error pulses are sent to the alarm unit. The intentional violations injected by the tansmitter are interpreted by the alarm and service unit as voice and data service cannels. Other violations are also reported to the alarm and service unit but are evaluated as channel deteriorate. The optical tranceiver card receives the MCMI coded electrical signals and converts them into light pulses by a laser diode. On the receiving side of this card optical signals are converted into electrical pulses by using a PIN-FET module. The alarm and service unit evaluates the alarms and provides a service channel for the FOLTE. With the advancement of technology more and more analog functions are being performed by digital circuits. Digital components can be divided into two groups: standard components and Application Specific Integrated Circuits (ASIC). This distinction is based on general purpose usage or application specific usage. ASICs can also be divided into two groups: Programmable Logic Devices (PLD) and custom products, and this distinction is based on whether the product is going to be manufactured in the field or the manufacturers premises. Due to recent developments and competitions in the electronics market, the life cycle of products are being reduced. This puts pressure on manufacturers to reduce their design cycles. PLDs are one of the most important devices that reduce development time. In applications where gate counts are high, most convenient family of devices are the FPGAs, when production volumes are low. Prototyping with an FPGA allows early system verification without incurring delay or NRE charges. The FPGA's density and flexibility makes prototyping feasible without using an inordinately large number of devices to prototype a single ASIC. Desktop programmability brings additional time savings to the prototyping method. The designer does not have to worry about the time delay of sending the chip back to the foundry for additional turns. The designer can use the time that would have been spent as a waiting period for further testing of the devices. The saving of time and manpower increases the positive impact that the prototyping method has on a product's price-performance, quality and time-to-market. Then, If a device function has been proven, and If it makes economic sense, the designer can migrate the design to a mask-programmed solution. The FPGA is a class of PLDs which are more closely related to Gate Arrays than to PALs. There are several architectures loosely grouped into this class. A primary differentiation between these products can be made by considering the various programming elements. The FPGAs combine gate array flexibility with desktop programmability. This combination allows the ASIC designer to avoid fabrication cycle times and NRE charges (xi) associated with conventional mask-programmed gate arrays. The FPGAs are unique in that the arrays are totally fabricated and shipped to the user ready for programming. The FPGAs have many advantages, some of which exist in either the user-programmed PLD products or the mask-programmed gate array. PLDs are easy-to-use, have industry standard architectures and provide a low-risk, fast design-cycle solution for low-density designs. At the opposite end of the spectrum are masked gate arrays. Gate arrays overcome the density limitation of PLDs, but do not address the short design cycles and low risk needs of today's designers. The FPGA offers the designer the key advantages of both PLDs and mask-programmed gate arrays, including ease-of-use, familiar and easy-to-leam design tools, desk-top programmability, low risk, high density and high performance. In addition, the FPGA offers 100% observability of internal nodes, design security, user-defined macros and development tools that accept designs from popular computer-aided engineering software packages. PLD architectures are geared towards very specific applications. PLDs use a programmable AND/OR plane that goes to dedicated flip-flops. Limited numbers of these flip-flops are available on each device. Also, any unused flip-flops on a PLD can not be used for other functions. In contrast, FPGAs have programmable logic modules which can be programmed as flip-flops if needed or any other type of logic function, including gates, latches or inverters. The FPGA architecture is similar to that of the channeled gate arrays in that both devices are implemented via wiring resources and cells (called logic modules on an FPGA ). This makes Implementation of logic functions and routing very flexible and allows the FPGA to reach 90% gate utilizations. Both mask-programmed gate arrays and FPGAs have I/O buffers around the perimeter that are configurable as inputs, outputs, bidirectionals l/Os or 3-state l/Os. The FPGAs have a clock distribution network that allows the implementation of a minimal skew, distributed clock for high-speed synchronous designs. in this thesis, an FPGA was designed which replaced a number of analog, hybrit circuits and discrete components. This enabled us to eliminate a card from the system. The 68 pin FPGA was placed on the optical tranceiver card. In the previous version of interface card, the line code was CMI and service channel was amplitude modulated on the CMI coded signal. But in this version MCMI is used to transmit a digital service channel. By reducing the amount of discrete components we have increased the realibility of the system. Also by replacing a complete card by an FPGA we have reduced the cost by one fifth. The other advantage is that we have reduced the power consumption by one tenth. The security fuse on the FPGA provides design confidentiality. By using 1662 of the 2000 equivalent gates on the A1020, we have achieved 83% gate utilization.