Sayısal işaret işleme geliştirme sistemi tasarımı ve gerçeklenmesi

dc.contributor.advisor Dervişoğlu, Ahmet
dc.contributor.author Aydın, İlker
dc.contributor.authorID 22082
dc.contributor.department Telekomünikasyon Mühendisliği
dc.date.accessioned 2023-02-24T08:13:50Z
dc.date.available 2023-02-24T08:13:50Z
dc.date.issued 1992
dc.description Tez (Yüksek Lisans) -- İstanbul Teknik Üniversitesi, Fen Bilimleri Enstitüsü, 1992
dc.description.abstract Bu tezde TMS320C10 sayısal işaret işlemcisine dayalı ve PC CPersonal Computer : Kişisel Bilgisayara tarafından programlanabilen bir 'Sayısal t şar et tşleme Geliştirme Sistemi' tasarımı ve gerçeklenmesi yapılmıştır. Sistem, üzerinde TMS320C10 işlemcisi, hem işlemcinin hem de PC'nin erişebildiği bir bellek.işlemci ve PC'nin haber leşmesi için özel bir paralel haberleşme birimi, analog/sa- yısal sayı sal /analog bağlaşım birimi bulunan bir ana kart, PC genişletme yuvasına takılan bir arabaglaşım kartı ve PC de koşan sistem yazılımı 'DSPLAB' dan oluşmaktadır. Sistem yardımıyla, TMS320C10 simgesel dilinde yazılarak PC'deki derleyici ile derlenen kodlar ana karttaki belleğe yüklenebilmek t e ve işlemci tarafından koşturul abilmekte- dir. Ayrıca 'DSPLAB' yazılımı aracılığıyla, sadece katsayı ları girilerek 30. dereceye kadar FIR CFinite tmpuls Res ponse : Sonlu impuls yanıtlı D,4. dereceye kadar I İR C Infinite impuls Response : Sonsuz impuls yanıtlı D tipi sayısal filtreler otomatik olarak gerçeklenebilmektedir. Bu özellik sayesinde kullanıcının TMS3S0C10 işlemcisinin simgesel dilini bilmesine gerek olmaksızın.yalnızca kat sayıları girerek sayısal filtre gerçeklemesine olanak sag^ lanmıştır. tr_TR
dc.description.abstract Digital signal processing applications have became more and more important for last ten year s. Di gi t-al Signal Pro cessors are product of developments in semi conductor tec- nol ogy. Di gi tal signal processors CDSPD are special micro processors. They are designed for implementing digital signal processing algorithms rapidly. For this reason DSP's have combinatorial multiplication units. DSP processor- makes a multiplication operation just in one cycle which requires many cycles in ordinary microprocessors. The TMS32ÜC1Ö is the first advanced digital signal pro cessor. It has 18-bit data bus and 13-bit address bus. Hie TMS3S0C10 has Hai-ward architecture, it means program and data memories are two separate spaces. This architecture permits a full overlap of instruction fetch and executi on. There is 14,4x1 6-bit internal data RAM and 4Kx±8- bit ROM memory space in the TMS320C1Ö. 1336x16 bits part of ROM can be adddr-essed in internal ROM with MO'MP* pin of processor. There is 4x1 2-bit stack for storage return add resses of the subroutines. Because of the staek depth of 4 » the nested subroutine count is 4 as a maximum. In this thesis a "Digital Signal Processing Development- System * is designed and realised. The system covers a main DSP card,an interface card which is plaeed in PC C Personel Computer- 3 expansion slot and system software ' DSPLAB* which is running at PC. Som© kind of application programs which are written in assembler language of TMS320C10,can be downloaded to the main DSP card's memory and these codes can be run in DSP. Additionaly, by entering the filter coeficients the digi tal FIR and IIR filters can be automaticly realised. With this feature of system software ' DSPLAB'.users can imple ment digital filters, without knowing assembler language of TMS330C10. The system is designed to provide many applications in digital signal processing. Flexible hardware of the system can be expanded for many applications, because, there is an expansion connector in the main DSP card. For example another card which has fast A/D and D/A converter,can be connected to the main card. Also other kind of interface cards can be connected. TMS3a0C10 assembler program produces a hex file which contains the machine code of the processor. 'DSPLAB* takes this file and downloads to DSP's memory in the main DSP card. After downl oadi ng, PC resets the processor arid proces sor runs the program downloaded. Memory content of DSP-can be observed with 'DSPLAB' if desired. Or content of a memo ry location can be changed. 'DSPLAB' can make self test. In self test »memory and communication tests of the main DSP card are done. 'Application Modules* section of 'DSPLAB' is very useful for digital filter implementations. Any FIR filter up to 50' th VIII degree or any IIR filter up to 4'th degree can be implemented in this section. The user designs a filter Cit means, user cal culates the filter coeficients D and enters coeficients of the filter to 'DSPLAB'. A hex file containing a filter prog ram is loaded by 'DSPLAB* and coeficients of this program are exchanged with entered coeficients. After these proces ses, code is downloaded to main DSP card and run. The main DSP card contains an on board analog interface circuit. There is a codec chip in this circuit. Codec is used for telephone communication in digital exchanges. For this reason codecs has 3400 Hz frequency bandwidth. Because of this boundary of codec, signal frequency which can be processed should be less then 3400 Hz. Faster A/D or D/A can be connected via the 'Digital Expansion Connector '. But cur rent structure of 'DSPLAB' software does not permit automa tic filter realization with external analog interface. tf this kind of application is desired, an interface softwa re should be added to 'DSPLAB*. The interface between the main DSP card and PC is estab lished with an interface card which is placed into the PC expansion slot.I^O address maps of IBM compatible PCs con tain a region for prototype cards. This region has 32 ports C300H-31FHD. Development system software 'DSPLAB' u- ses 9 of them for addressing some registers on the main DSP card. The PC interface card contains only 3 chips. Two of them are buffer chips. Data bus,S address CA0-A4D, I/O write and read signals of PC are buffered on this card. Additionaly a card select signal is produced on this card IX for selecting prototype address region of the PC. It means, if PC produces an address between 300H-31FH,CE signal is asserted. A 26-pin flat cable connector is used for the interface between PC and main DSP card. Another advantage of the system is that no power supply is required. Because, main DSP card takes supply voltages from the PC by the interface card. A new tecnology is used in this system desing, 'PAL*. PAL C Programmable Array LogieD devices contain AND and OR gate arrays. There is a fuse matrix before AND gates. Outputs of AND gates are connected to OR gates. A lot of Boolean functions can be realized by programming the mat rix. For example 16L8 PAL can realize eight Boolean functi ons which has 11 variables or two Boolean functions which has 16 variables. This flexibility decrease chip counts of the systems. For example address decoding logic of the main DSP card is done on PAL22V10. Nine select sig nals are produced only in one chip. If these Boolean func tions were realized with ordinary logic chips,ten or more chips would be required. For this reason 3 PAL devices are used in the system design. Many different DSP applications can be realized with the DSP Development System. Some of them are explained in the following. v. aD Filter Realization. Current structure of the system can realise automatically FIR filters Cless then SO degree} and IIR filters Cless then 5 degreed. But degree of filters can be increased with a small change in 'Application Modules' part of DSPLAB. fcO Function Generation. Many different signals C sinwave, square wave etc. D can be realized by DSP processor. Frequency of waves can be changed with some coeficients. As a result, the system can be used as a smart oscillator. eD Fast Fourier Transform. For example 1024 point FFT can be processed on main DSP card and results of FFT can be sent to the PC in real time. A graphical simulation can be done on PC monitor. d} Adaptive Filter Realization. DSP processor can realize many different adaptive algo rithms. For example PCM CPulse Code Modulation} coded*- voice can be converted to ADPCM C Adaptive Differential PCND by this system. As known, a sample of voice is coded with S bits on PCM. On ADPCM this bit count is 4. It means 8-bit voice is compressed to 4 bits. This result is used for storing voice on a smaller memory. e} Industrial Control Applications. In last five years the use of digital control systems has increased in industrial control area. Some motor control algorithms can be done by this system. For example,an interface card is prepared and connected to the expansion connector of the main DSP card. With this structure, speed control of motors can be done. xi f} Image Processing. Two diraentional signal processing algorithms can be run at DSP processor also. DSP processor processes a picture in extremelly shorter time than a PC. Some kind of fast two dimentional algorithms can be run and the results are sent to PC and that PC can draw these results. For example some kind of image enhancement algorithms can be applied. g} Speech Synthesis and Recognition. Speech synthesis and recognition are new application area of DSP. Some kind of algorithms can be run on this system for speech synthesis and recognition. en_US
dc.description.degree Yüksek Lisans
dc.identifier.uri http://hdl.handle.net/11527/21632
dc.language.iso tr
dc.publisher Fen Bilimleri Enstitüsü
dc.rights Kurumsal arşive yüklenen tüm eserler telif hakkı ile korunmaktadır. Bunlar, bu kaynak üzerinden herhangi bir amaçla görüntülenebilir, ancak yazılı izin alınmadan herhangi bir biçimde yeniden oluşturulması veya dağıtılması yasaklanmıştır. tr_TR
dc.rights All works uploaded to the institutional repository are protected by copyright. They may be viewed from this source for any purpose, but reproduction or distribution in any format is prohibited without written permission. en_US
dc.subject Sayısal işaret işleme tr_TR
dc.subject Tasarım tr_TR
dc.subject Digital signal processing en_US
dc.subject Design en_US
dc.title Sayısal işaret işleme geliştirme sistemi tasarımı ve gerçeklenmesi tr_TR
dc.title.alternative Digital signal processing development system design and realization en_US
dc.type Master Thesis en_US
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