A chaotic time-delay system based digital RNG and integrated autonomous test suite

Abstract

This paper presents a time-delay system which originally has chaotic behavior, yet lost that dynamic due to finite quantization levels of state variable representation. One method to overcome this destructive effect of digitalization is engaging a time-varying delay amount which is studied in this paper. Based on this system, random number generator (RNG) topologies are demonstrated with better throughput values in comparison with our previous implementations. Online performance monitoring ability is integrated to the RNG for a further investigation on physical implementation variations. The results related to the implementation area variation and target Field-Programmable Gate Array (FPGA) chip variation are reported and discussed. The initial findings promise an advanced usage of proposed RNGs as Physically Unclonnable Function (PUF).