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A Comparison of the Model Order Reduction Techniques for Linear Systems Arising from VLSI Interconnection Simulation

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dc.contributor.authorE. Fatih, Yetkin
dc.contributor.authorHasan, Dağ
dc.date.accessioned2026-01-26T06:51:28Z
dc.date.issued2004-03-01
dc.description.abstractAbstractIn recent years, model order reduction scheme for reducing the dimension of linear systems has become very popular for computer aided design of the systems. In this paper, we analyze the existent methods of the model order reduction techniques used in Very Large Scale Integrated (VLSI) circuit interconnection modelling in terms of numerical stability, computational speed and accuracy. (© 2004 WILEY‐VCH Verlag GmbH & Co. KGaA, Weinheim)
dc.description.urihttps://doi.org/10.1002/anac.200310026
dc.description.urihttps://zbmath.org/2141595
dc.description.urihttps://dx.doi.org/10.1002/anac.200310026
dc.identifier.doi10.1002/anac.200310026
dc.identifier.eissn1611-8189
dc.identifier.endpage303
dc.identifier.issn1611-8170
dc.identifier.openairedoi_dedup___::f23dc3fe4a5743f774a2d32f6f302864
dc.identifier.startpage290
dc.identifier.urihttps://hdl.handle.net/11527/63164
dc.identifier.volume1
dc.language.isoeng
dc.publisherWiley
dc.relation.ispartofApplied Numerical Analysis & Computational Mathematics
dc.rightsCLOSED
dc.subjectLinear systems in control theory
dc.subjectRealizations from input-output data
dc.titleA Comparison of the Model Order Reduction Techniques for Linear Systems Arising from VLSI Interconnection Simulation
dc.typeArticle
dspace.entity.typePublication

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