A cryogenic modeling methodology of MOSFET I-V characteristics in BSIM3

Abstract

Transistor models for circuit analysis have temperature dependent parameters which are only valid in standard temperature range of −55 °C to 125 °C in general. Circuits designed for low temperature military and space applications should work in cryogenic conditions properly. Thus, transistor models must be modified. In this paper, a methodology has been developed to optimize these parameters for MOSFET devices at low temperatures. The methodology updates all parameters regulating the temperature dependency of the drain current, threshold voltage and saturation velocity based on the chosen target data set taken at low temperature. An automated system involving a circuit simulator and mathematical programming tool has been established that can analytically compute revised model parameters independent of the transistor process. Using this methodology, average errors in I-V curves of various sizes NMOS and PMOS transistors for 0.18 μm technology has been reduced below 2.5% and 3.5%, respectively.