Implementation of Enigma machine using verilog on an FPGA

Abstract

The Enigma machine was used in the twentieth century for enciphering and deciphering secret messages. It has been implemented on an Field Programmable Gate Array (FPGA) in this paper. The Enigma machine is kind of poly alphabetic cipher. In other words, even if input is the same letter, output can be a different letter. Therefore, the Enigma machine can not be broken by using easy methods of cryptanalysis as frequency analysis. The Enigma machine in this paper has common properties with the Enigma machine which was used in the Second World War. The only difference is that it has been implemented on an FPGA rather than a mechanical implementation. Verilog hardware description language (HDL) has been used in this implementation.