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CMOS four terminal floating nullor design using a simple approach

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Elsevier BV

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Abstract In this study a simple approach for design of four terminal floating nullor (FTFN) is introduced and two new CMOS FTFN topologies are proposed using the approach from suitable CMOS negative current conveyor (CCII−) structures. The performance of the proposed circuits was tested by Pspice computer simulation program. The feasibility of the proposed circuits was shown on a current-mode band-pass filter example constructed using one of the proposed CMOS FTFN circuits. The simulation results are given to confirm the predicted theory.

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