Characterization and modeling of negative-biastemperature instability in 40 NM CMOS technologythrough long short-term memory (LSTM) networks - Gencer, Fikret Başar (Graduate School, 2023)
In this thesis, the time-based degradation effect of the negative-bias temperature instability (NBTI) phenomenon, which is one of the aging mechanisms in transistors, is investigated. This type of aging effect is seen in two separate phases of the stress and recovery process. The time-series nature of the problem suggests using a model capable of predicting temporal changes. Thus, long short-term memory (LSTM) networks have been used to model NBTI aging effect. Negative-bias temperature instability is essentially an aging effect specific to p-type transistors. More generally, bias temperature instability occurs in both p-type and n-type metal-oxide-semiconductor field-effect-transistor (MOSFETs). It is also seen as positive-bias temperature instability in n-type transistors, yet its effect is more prominent in p-type transistors. This mechanism is seen when p-type transistors operate at high temperatures and are exposed to high negative gate voltages. Manufacturing defects, trapping of positively charged holes in the dielectric region, and the formation of interface states due to negative voltage can be shown as the main reasons for NBTI. The result could bring side effects such as a decrease in the transistor drain current and an increase in the threshold voltage. In deep learning, artificial neural networks can be used for transistor modeling because data-driven modeling can be presented instead of revealing a physical model based on the transistor characteristic equations. In order to model aging effects with deep learning methods, stress periods should not be ignored, which is directly related to the temporal nature of aging. Since the measurements taken at certain time intervals in the observation of the NBTI effect are related to each other, the artificial neural network algorithm should be suitable for this. For this reason, long-short-term memory networks have been used in this study which is under the category of recurrent neural networks (RNN), and have been developed as a solution to the vanishing gradient problem experienced by networks developed with RNN during learning processes. LSTM networks change the unit cell structure by introducing a long-term memory mechanism to RNN networks, and thus, they do not encounter the problem of vanishing gradient, which occurs when the effects of the information that needs to be remembered in the long-term may arise during the training process. In addition, it is mainly used in studies such as taking time series inputs while training for pattern recognition and prediction. The working mechanism of LSTM is suitable since the NBTI problem can actually be transformed into a time series problem. In this thesis, an automated setup and special test chips developed within the scope of the TÜBİTAK project were used for NBTI characterization and modeling. Thanks to these developed chips and the circuit board, the chips can be exposed to appropriate stress conditions. In these specially designed structures, there are 64 separate transistors, 32 of which are RF and 32 of which are normal MOSFETs. Half of these 32 transistors are allocated as n-type transistors, and the remaining half as p-type transistors with different transistor sizes. The test chip structure contains a decoder in the input layer and sends the desired input address to the 32 multiplexers, which can turn all of the transistors on and off in response to the signals applied to their inputs, as well as open or close the 32 switch structures. These switch structures control these 32 transistors whose drain, source, and gate terminals are connected in parallel to the chip output, can be biased externally, and the current value can be measured. The test setup contains different industrial measuring instruments and enables them to be controlled with a computer program developed in the LabVIEW environment. After the appropriate measurement standards are determined in the LabVIEW environment, the desired inputs, such as the measurement time, how many measurements will be taken, and which transistors will be measured, are determined. Afterward, measurements are started from the transistors left to the stress environment to be applied, depending on the situation. In the measurements, 4 different p-type transistors in the test chip were used. The measurements were collected by changing both the drain-source voltage and the gate-source voltage in the form of the current-voltage relationship. These measurements were first made under room conditions. Afterward, only the environment temperature was increased. After that, it is aimed to observe the NBTI effect with the negative gate voltage while keeping the temperature at a high level. The transistors were exposed to the negative voltage at certain intervals, and then they were expected to enter a temporary recovery period for a certain period of time. This step was repeated 5 times with different stress and different temporary recovery measurements. On the last stress measurement, temporary recovery was not waited to end, and measurements were taken at regular intervals. In this way, a total of 18 sequence characteristic measurements, 50 points per measurement, with 13 different recovery measurements in 5 different stress processes, were recorded in the dataset with the aforementioned methods. As a result of the collection and detailed analysis of the mentioned measurements, the data were first separated into appropriate sequences in order to create the appropriate model. In order to use a network structure such as LSTM, data can be given as two different types of input. The first of these is to think of the data as a time series problem and to express the appropriate parameters with overlapping and sliding windows in the input space, and the other is to consider each of the data in the dataset as data taken at a separate time and apply them one by one in sequences. Since both methods have their own contributions to the training of the model, two different decomposition methods were used. Firstly, in order to make a model that predicts the current with the high success of the sliding windows method, the past values of the current and the parameters such as terminal voltages at these values, stress voltage, and stress duration are included in the inputs, and the drain current value after a certain step is tried to be estimated. In the other method mentioned, the transistor current data is used only in the output space, and the features that allow obtaining that output are used in the input space. With these inputs, the model was trained with monitoring machine learning error techniques. such as root mean square error. In conclusion, the collected dataset and the modeling have been demonstrated as LSTM structures that are successful in modeling aging effects, such as NBTI. Thanks to the developed model, the stress times that are unseen to the model were estimated, and these were observed as expected when compared to the previous data. In addition, optimizing the recovery process becomes a short-term problem because it is possible to discover exactly when the recovery will occur thanks to the model. With these achievements, it can be revealed how the transistors developed by the manufacturers can respond to different situations with such a model. Another output is that the model can be used in different areas by developing designs that are NBTI-aware and taking precautions accordingly by transferring the developed model to a circuit simulation program.
Uzun kısa-süreli bellek ağlarıyla (LSTM)40 NM CMOS teknolojisinde negatif-kutuplamasıcaklık kararsızlığının karakterizasyonu ve modellenmesi
Thesis (M.Sc.) -- İstanbul Technical University, Graduate School, 2023
Keywords: transistors; transistörler; machine learning; makine öğrenmesi; networks; ağlar