Defect Tolerant Logic Synthesis for Memristor Crossbars with Performance Evaluation
Defect Tolerant Logic Synthesis for Memristor Crossbars with Performance Evaluation
Tarih
2018
Yazarlar
Tunali, Onur
Morgül, M. Ceylan
Altun, Mustafa
Süreli Yayın başlığı
Süreli Yayın ISSN
Cilt Başlığı
Yayınevi
IEEE
Özet
In this paper, we study defect-tolerant logic synthesis
of memristor-based crossbar architectures. We
propose a hybrid algorithm, combining heuristic and
exact algorithms, that achieves perfect tolerance for 10-percent stuck-at open defect
rates. Along with defect tolerance, we also consider area, delay, and power costs of the
memristor crossbars to elaborate on two-level and multi-level logic designs.
Açıklama
Anahtar kelimeler
Memristors,
Logic functions,
Delays,
Logic design,
Heuristic algorithms,
Logic arrays,
Logic gates
Alıntı
O. Tunali, M. C. Morgul and M. Altun, "Defect-Tolerant Logic Synthesis for Memristor Crossbars with Performance Evaluation," in IEEE Micro, vol. 38, no. 5, pp. 22-31, Sep./Oct. 2018.
doi: 10.1109/MM.2018.053631138