High performance CMOS realization of the third generation current conveyor (CCIII)

Abstract

In this paper a new CMOS high performance dual-output realization of the third generation current conveyor (CCIII) is presented. The proposed CCIII provides good linearity, high output impedance at port Z and excellent input/output current gain. PSPICE simulation results using the MIETEC 1.2 /spl mu/m CMOS process model are included to verify the expected values.