Publication: Spin-Torque Memristor based Offset Cancellation Technique for Sense Amplifiers
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Date
Advisor
Department
Elektronik ve Haberleşme Mühendisliği
Journal Title
Journal ISSN
Volume Title
Publisher
IEEE
Type
Abstract
Unpredictable threshold voltage changes of CMOS
transistors cause input referred random offset (IRRO) in sense
amplifiers. With the shrinkage of transistors in nano regime,
it is being quite costly to cancel the offsets using conventional
CMOS based techniques. Motivated by this fact, this study
focuses on the IRRO cancellation with the aid of the spintorque memristor technology. Spin-torque memristors in series,
compared to parallel, show less resistance and process variations.
The resistance value of a spin-torque memristor is regarded as
frozen when the current flow over the spin-torque memristor
is lower than its critical switching current value. In fact, the
proposed structure employs a non-destructive sensing scheme in
order to achieve a relatively large sense margin by reducing the
IRRO. Our main idea is to reduce or eliminate the IRRO by
exploiting the spin-torque memristors for providing the current
matching on the input transistors of the voltage comparator. In
particular, the overwrite problem of the spin-torque memristor is
solved by setting the critical switching current of the spin-torque
memristor to be greater than a current value corresponding to
the maximum IRRO value. We evaluate the IRRO cancellation
technique on the proposed comparator or sense amplifier using
45nm predictive CMOS technology. Although sense amplifiers
are targeted in this study, our technique can be applied to any
analog amplifier suffering from the IRRO.
Description
Journal or Series
ISSN
ISBN
978-1-5090-5052-9
Rights
Keywords
Sense Amplifiers, Spin-Torque Memristor
Citation
M. Atasoyu, M. Altun, S. Ozoguz and K. Roy, "Spin-torque memristor based offset cancellation technique for sense amplifiers," 2017 14th International Conference on Synthesis, Modeling, Analysis and Simulation Methods and Applications to Circuit Design (SMACD), Giardini Naxos, 2017, pp. 1-4.
doi: 10.1109/SMACD.2017.7981595