Design of low phase noise 7.7 GHz dielectric resonator oscillator

Abstract

In this work, a dielectric resonator stabilized oscillator with output frequency at 7.7 GHz is designed, simulated and measured. The oscillator topology is based on the series feedback dielectric resonator oscillator (DRO) structure. The precise design procedure of the series feedback dielectric resonator oscillator is presented. A λ/4 open stub microstrip line is arranged at the output port in order to improve the suppressions of harmonic frequencies. The simulation results show that, the phase noise exhibits about -100 dBc/Hz@10KHz while the output power at 7.7 GHz is 10 dBm and the suppression of harmonic frequencies are better than -50dBc. In the practical measurements, the phase noise exhibits -95dBc/Hz@10KHz while the output power is 9.4 dbm and the suppression of harmonic frequencies are better than -40 dBc.