Robust Design of Basic Low Voltage CMOS Transconductors

Abstract

Two new low voltage transconductors are introduced and the statistical design of these transconductors are presented. The circuits operate in the saturation region with fully balanced input signals. Initial circuit simulation results are given. Response surface methodology and design of experiment techniques are used as statistical VLSI design tools together with the statistical MOS (SMOS) model. The response surfaces obtained for the two transconductors show the trade-off between area and functional yield. Using these contours, the designer will be able to estimate the functional yield of the circuits before fabrication. The contours also provide information regarding which transistor aspect ratios are to be altered to achieve a better functional yield.