The degradation of MOSFETs induced by the via etching of interlayer low-k polymers

Abstract

We report on the effects of via etching through two low-k polymers (FLARE and BCB) used as interlayer dielectrics, on the performance of 0.35 /spl mu/m long n-channel MOSFETs with 45 /spl Aring/ thick gate oxides. It is observed that the via etching of the polymers damages the MOSFET and that this damage is severer in the case of BCB via etching. The inclusion of an insulating Si/sub 3/N/sub 4/ layer underneath the polymer is found to be very effective in reducing the MOSFET's damage. Alternatively, annealing in forming gas at 350/spl deg/C for 30 min after the via etching can further eliminate device damage.