A 5Gb/s CDR with automatic frequency calibration

Abstract

A new technique for VCO calibration is presented for clock and data recovery (CDR) circuits. This method is applicable to current controlled oscillators. After the frequency lock is achieved, the oscillator current is sampled by a simple current mode analog to digital converter (ADC) and a narrower range is generated around the sampled point. A CDR system, which operates at 5-Gb/s data rate, is designed and simulated in 0.18-µm CMOS technology to verify the proposed method.