DTMOS Based High Bandwidth Four-Quadrant Analog Multiplier

Abstract

Analog multiplication circuits are very important block structures which are widely used in analog signal applications. In analog multiplication circuits, low power consumption is expected with wide bandwidth, low nonlinearity and high input range according to supply voltage. In this study, folded Gilbert cell structure was resized using dynamic threshold MOS (DTMOS) transistors and low power consumption and high bandwidth have been obtained. In improver, the bandwidth was obtained at values of 3.63 GHz, temperature variation, total harmonic distortion and intermodulation products of the proposed multiplier were examined. Monte Carlo analysis was performed and error analysis of the dimensioning of the circuit was examined. In summation to the high bandwidth, a low power consumption of 44.5 µW has been achieved and the supply voltage of 0.2 V has been achieved to operate in full-scale input range.